参数资料
型号: AD7242JN
厂商: ANALOG DEVICES INC
元件分类: DAC
英文描述: LC2MOS Dual, Complete, 12-Bit/14-Bit Serial DACs
中文描述: DUAL, SERIAL INPUT LOADING, 2 us SETTLING TIME, 12-BIT DAC, PDIP24
封装: 0.300 INCH, PLASTIC, DIP-24
文件页数: 7/12页
文件大小: 319K
代理商: AD7242JN
AD7242/AD7244
REV. A
–7–
Output Amplifier
The outputs from each of the voltage-mode DACs are buffered
by a noninverting amplifier. The buffer amplifier is capable of
developing
±
3 V across a 2 k
and 100 pF load to ground, and
can produce 6 V peak-to-peak sine wave signals to a frequency
of 20 kHz. The output is updated on the falling edge of the
respective
LDAC
input. The output voltage settling time, to
within 1/2 LSB of its final value, is typically less than 2
μ
s for
the AD7242 and 2.5
μ
s for the AD7244.
The small signal (200 mV p-p) bandwidth of the output buffer
amplifier is typically 1 MHz. The output noise from the
amplifier is low, with a figure of 30 nV/
Hz
at a frequency of
1 kHz. The broadband noise from the amplifier exhibits a
typical peak-to-peak figure of 150
μ
V for a 1 MHz output
bandwidth. Figure 4 shows a typical plot of noise spectral
density versus frequency for the output buffer amplifier and for
the on-chip reference (including and excluding the decoupling
components).
Figure 4. Noise Spectral Density vs. Frequency
TRANSFER FUNCTION
The basic circuit configuration for the AD7242/AD7244 is
shown in Figure 5. Table I and Table II show the ideal input
code to output voltage relationship for the AD7242 and
AD7244 respectively. Input coding for the AD7242/AD7244 is
2s complement.
Figure 5. Basic Connection Diagram
For the AD7242, the output voltage can be expressed in terms
of the input code,
N
, using the following relationship:
V
OUT
=
2
N
REF IN
4096
where –2048
N
+2047
For the AD7244, the output voltage can be expressed in terms
of the input code,
N
, using the following relationship:
V
OUT
=
2
N
REF IN
where –8192
N
+8191
16384
Table I. AD7242 Ideal Input/Output Code Table Code
DAC Latch Contents
MSB
LSB
Analog Output, V
OUT
*
01 11 1111 1111
01 11 1111 1110
00 00 0000 0001
00 00 0000 0000
11 11 1111 1111
10 00 0000 0001
10 00 0000 0000
+2.998535 V
+2.99707 V
+0.001465 V
0 V
–0.001465 V
–2.998535 V
–3 V
*Assuming REF IN = +3 V.
Table II. AD7244 Ideal Input/Output Code Table Code
DAC Latch Contents
MSB
LSB
Analog Output, V
OUT
*
01 1111 1111 1111
01 1111 1111 1110
00 0000 0000 0001
00 0000 0000 0000
11 1111 1111 1111
10 0000 0000 0001
10 0000 0000 0000
+2.999634 V
+2.99268 V
+0.000366 V
0 V
–0.000366 V
–2.999634 V
–3 V
*Assuming REF IN = +3 V.
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