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参数资料
| 型号： | AD7324BRUZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/37页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT+SAR 4CHAN 16-TSSOP |
| 标准包装： | 2,500 |
| 位数： | 12 |
| 采样率（每秒）： | 1M |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 30mW |
| 电压电源： | 双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 4 个单端，单极；4 个单端，双极；2 个差分，单极；2 个差分，双极 |
| 配用： | EVAL-AD7324CBZ-ND - BOARD EVALUATION FOR AD7324CBZ |
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Data Sheet
AD7324
Rev. B | Page 21 of 36
8
–8
6
4
2
0
–2
–4
–6
±2.5V
RANGE
±10V
RANGE
±10V
RANGE
±5V RANGE
±2.5V
RANGE
±5V RANGE
0V TO +10V
RANGE
0V TO +10V
RANGE
±16.5V VDD/VSS
±12V VDD/VSS
04864-
039
PSEU
D
O
I
N
PU
T
VO
L
T
A
G
E
R
A
N
G
E
(V)
VCC = 5V
VREF = 2.5V
Figure 40. Pseudo Input Range with VCC = 5 V
±2.5V
RANGE
±10V
RANGE
±10V
RANGE
±5V RANGE
±2.5V
RANGE
±5V RANGE
0V TO +10V
RANGE
0V TO +10V
RANGE
±16.5V VDD/VSS
±12V VDD/VSS
4
–8
2
0
–2
–4
–6
04864-
040
VCC = 3V
VREF = 2.5V
PSEU
D
O
I
N
PU
T
VO
L
T
A
G
E
R
A
N
G
E
(V)
Figure 41. Pseudo Input Range with VCC = 3 V
DRIVER AMPLIFIER CHOICE
In applications where the harmonic distortion and signal-to-
noise ratio are critical specifications, the analog input of the
AD7324 should be driven from a low impedance source. Large
source impedances significantly affect the ac performance of the
ADC and can necessitate the use of an input buffer amplifier.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of THD that can be
tolerated in the application. The THD increases as the source
impedance increases and performance degrades. Figure 21 and
Figure 22 show graphs of the THD vs. the analog input frequency
for various source impedances. Depending on the input range
and analog input configuration selected, the AD7324 can
handle source impedances of up to 4.7 k before the THD
starts to degrade.
Due to the programmable nature of the analog inputs on the
AD7324, the choice of op amp used to drive the inputs is a
function of the particular application and depends on the input
configuration and the analog input voltage ranges selected.
The driver amplifier must be able to settle for a full-scale step to
a 13-bit level, 0.0122%, in less than the specified acquisition
time of the AD7324. An op amp such as the AD8021 meets this
requirement when operating in single-ended mode. The AD8021
needs an external compensating NPO type of capacitor. The
AD8022 can also be used in high frequency applications where
a dual version is required. For lower frequency applications, op
the AD7324 in single-ended mode configuration.
Differential operation requires that VIN+ and VIN be simulta-
neously driven with two signals of equal amplitude that are 180°
out of phase. The common mode must be set up externally to the
AD7324. The common-mode range is determined by the REFIN/
OUT voltage, the VCC supply voltage, and the particular amplifier
used to drive the analog inputs. Differential mode with either an
ac input or a dc input provides the best THD performance over a
wide frequency range. Because not all applications have a signal
preconditioned for differential operation, there is often a need to
perform the single-ended-to-differential conversion.
This single-ended-to-differential conversion can be performed
using an op amp pair. Typical connection diagrams for an op
amp pair are shown in Figure 42 and Figure 43. In Figure 42,
the common-mode signal is applied to the noninverting input
of the second amplifier.
VIN
V+
V–
3k
1.5k
1.5k
1.5k
1.5k
10k
20k
VCOM
04864-
029
Figure 42. Single-Ended-to-Differential Configuration with the AD845
VIN
V+
V–
442
442
442
442
442
100
AD8021
442
04864-
030
Figure 43. Single-Ended-to-Differential Configuration with the AD8021
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