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参数资料
| 型号： | AD73311AR |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 通信及网络 |
| 英文描述： | Low Cost, Low Power CMOS General Purpose Analog Front End |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO20 |
| 封装： | SOIC-20 |
| 文件页数： | 3/36页 |
| 文件大小： | 382K |
| 代理商： | AD73311AR |
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REV. A
–3–
AD73311L
AD73311LA
Parameter
DAC SPECIFICATIONS (Continued)
Power Supply Rejection
Min
Typ
Max
Unit
Test Conditions/Comments
–
81
dB
Input Signal Level at AVDD and DVDD
Pins: 1.0 kHz, 100 mV p-p Sine Wave
64 kHz Input Sample Rate, Interpolator
Bypassed (CRE:5 = 1)
PGA = 6 dB
Group Delay
4, 5
25
μ
s
Output DC Offset
2, 7
Minimum Load Resistance, R
L2, 8
Single-Ended
Differential
Maximum Load Capacitance, C
L2, 8
Single-Ended
Differential
FREQUENCY RESPONSE
(ADC AND DAC)
9
Typical Output
0
0.03125
0.0625
0.125
0.1875
0.25
0.3125
0.375
0.4375
> 0.5
LOGIC INPUTS
V
INH
, Input High Voltage
V
INL
, Input Low Voltage
I
IH
, Input Current
C
IN
, Input Capacitance
LOGIC OUTPUT
V
OH
, Output High Voltage
V
OL
, Output Low Voltage
Three-State Leakage Current
POWER SUPPLIES
AVDD1, AVDD2
DVDD
I
DD10
–
30
+5
+50
mV
150
150
500
100
pF
pF
Normalized to f
SAMP
0
–
0.1
–
0.25
–
0.6
–
1.4
–
2.8
–
4.5
–
7.0
–
9.5
<
–
12.5
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Channel Frequency Response Is
Programmable by Means of External
Digital Filtering
V
DD
–
0.8
0
V
DD
0.8
10
10
V
V
μ
A
pF
V
DD
–
0.4
0
–
10
V
DD
0.4
+10
V
V
μ
A
|IOUT|
≤
100
μ
A
|IOUT|
≤
100
μ
A
2.7
2.7
3.3
3.3
V
V
See Table I
NOTES
Operating temperature range is as follows:
–
40
°
C to +105
°
C. Therefore, T
=
–
40
°
C and T
= +105
°
C.
2
Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise noted).
3
At input to sigma-delta modulator of ADC.
4
Guaranteed by design.
5
Overall group delay will be affected by the sample rate and the external digital
fi
ltering.
6
The ADC
’
s input impedance is inversely proportional to DMCLK and is approximated by: (4
×
10
11
)/DMCLK.
7
Between VOUTP and VOUTN.
8
At VOUT output.
9
Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of
–
10 dBm0), with 38 dB preampli
fi
er
bypassed and input gain of 0 dB.
10
Test Conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs.
Speci
fi
cations subject to change without notice.
Table I. Current Summary (AVDD = DVDD = 3.3 V)
Analog
Current Current
2
5.6
0.65
Internal Digital
External Interface
Current
0.5
0.5
0
Total Current
(Max)
8.0
12.5
1.0
MCLK
ON
YES
YES
NO
Conditions
ADC Only On
ADC and DAC On
REFCAP Only On
REFCAP and
REFOUT Only On 2.7
All Sections Off
SE
1
1
0
Comments
REFOUT Disabled
REFOUT Disabled
REFOUT Disabled
4.5
4.8
0
0
0.6
0
0
3.8
0.75
0
0
NO
YES
0
MCLK Active Levels Equal to
0 V and DVDD
Digital Inputs Static and Equal
to 0 V or DVDD
All Sections Off
1
μ
A
0.5
μ
A
0
20
μ
A
0
NO
The above values are in mA and are typical values unless otherwise noted.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD73311AR-REEL | 制造商:Analog Devices 功能描述:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SOIC W T/R |
| AD73311ARS | 制造商:Analog Devices 功能描述:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SSOP |
| AD73311ARS-REEL | 制造商:Analog Devices 功能描述:Audio Codec 1ADC / 1DAC 16-Bit 20-Pin SSOP T/R 制造商:Rochester Electronics LLC 功能描述:SPEECH & TELEPHONY CODEC I.C. - Tape and Reel |
| AD73311ARSZ | 功能描述:IC ANALOG FRONT END 20-SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模拟前端 (AFE) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:- 通道数:2 功率（瓦特）:- 电压 - 电源，模拟:3 V ~ 3.6 V 电压 - 电源，数字:3 V ~ 3.6 V 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:带卷 (TR) |
| AD73311ARSZ-REEL | 功能描述:IC ANALOG FRONT END 20-SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模拟前端 (AFE) 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:- 通道数:2 功率（瓦特）:- 电压 - 电源，模拟:3 V ~ 3.6 V 电压 - 电源，数字:3 V ~ 3.6 V 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:带卷 (TR) |
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