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参数资料
| 型号： | AD73411 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Low-Power CMOS Analog Front End with DSP Microcomputer(带DSP微计算机的单模拟前端) |
| 中文描述： | 低功耗CMOS模拟和DSP的微机前结束（带DSP的微计算机的单模拟前端） |
| 文件页数： | 6/12页 |
| 文件大小： | 78K |
| 代理商： | AD73411 |
–6–
REV. PrA 08/99
AD73411–SPECIFICATIONS
T
AMB
= +25°C
TECHNCAL
f
IN
(AVDD = DVDD = +3.0V to 3.6V; DGND = AGND = 0V, f
MCLK
= 16.384 MHz,
f
SAMP
= 64 kHz; T
A
= T
MN
to T
MAX
, unless otherwse noted)
PARAMETER
DSP SE CT ION
V
IH
V
IH
V
IL
V
OH
T est Conditions
Min
T yp
Max
Unit
Hi-Level Input Voltage
1, 2
Hi-Level CLKIN Voltage
Lo-Level Input Voltage
1, 3
Hi-Level Output Voltage
1, 4, 5
@ V
DD
= max
@ V
DD
= max
@ V
DD
= min
@ V
DD
= min
I
OH
= –0.5 mA
@ V
DD
= min
I
OH
= –100 μA
6
@ V
DD
= min
I
OL
= 2 mA
@ V
DD
= max
V
IN
= V
DD
max
V
IN
= 0 V
@ V
DD
= max
V
IN
= V
DD
max
8
@ V
DD
= max
V
IN
= 0 V
8
@ V
DD
= 3.3
t
CK
= 19 ns
10
2.0
2.2
V
V
V
0.8
2.4
V
V
DD
– 0.3
V
V
OL
Lo-Level Output Voltage
1, 4, 5
0.4
V
I
IH
Hi-Level Input Current
3
10
μA
I
IL
Lo-Level Input Current
3
10
μA
I
OZH
T hree-State Leakage Current
7
10
μA
I
OZL
T hree-State Leakage Current
7
10
μA
I
D D
Supply Current (Idle)
9
10
mA
t
CK
= 25 ns
10
8
mA
t
CK
= 30 ns
10
I
D D
7
@ V
DD
= 3.3
T
AMB
= +25°C
t
CK
= 19 ns
10
mA
Supply Current (Dynamic)
11
51
mA
t
CK
= 25 ns
10
41
mA
t
CK
= 30 ns
10
C
I
34
@ V
IN
= 2.5 V
f
IN
= 1.0 MHz
T
AMB
= +25°C
@ V
IN
= 2.5 V
mA
Input Pin Capacitance
3, 6, 12
8
pF
C
O
Output Pin Capacitance
6, 7, 12, 13
8
pF
NOT ES
1
1
Bidirectional pins: D0–D23, RFS0, RFS1, SCLK 0, SCLK 1, T FS0, T FS1, A1–A13, PF0–PF7.
1
2
Input only pins: RESET , BR, DR0, DR1, PWD.
1
3
Input only pins: CLK IN, RESET , BR, DR0, DR1, PWD.
1
4
Output pins: BG, PMS, DMS, BMS, IOMS, CMS, RD, WR, PWDACK , A0, DT 0, DT 1, CLK OUT , FL2–0, BGH.
1
5
Although specified for T T L outputs, all AD73411 outputs are CMOS-compatible and will drive to V
DD
and GND, assuming no dc loads.
1
6
Guaranteed but not tested.
1
7
T hree-statable pins: A0–A13, D0–D23, PMS, DMS, BMS, IOMS, CMS, RD, WR, DT 0, DT 1, SCLK 0, SCLK 1, T FS0, T FS1, RFS0, RFS1, PF0–PF7.
1
8
0 V on BR.
1
9
Idle refers to AD73411 state of operation during execution of IDLE instruction. Deasserted pins are driven to either
V
DD
or GND.
10
V
IN
= 0 V and 3 V. For typical figures for supply currents, refer to Power Dissipation section.
11
I
measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (types 1, 4, 5, 12, 13, 14), 30% are type 2
and type 6, and 20% are idle instructions.
12
Applies to PBGA package type.
13
Output pin capacitance is the capacitive load for any three-stated output pin.
Specifications subject to change without notice.
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