参数资料
型号: AD736KR-REEL
厂商: ANALOG DEVICES INC
元件分类: 模拟专用变换器
英文描述: Low Cost, Low Power, True RMS-to-DC Converter
中文描述: RMS TO DC CONVERTER, 0.005 MHz, PDSO8
封装: MS-012AA, SOIC-8
文件页数: 5/8页
文件大小: 218K
代理商: AD736KR-REEL
AD736
REV. C
–5–
Typical Characteristics–
Figure 10. Error vs. RMS Input
Voltage (Pin 2), Output Buffer Off-
set Is Adjusted To Zero
Figure 13. Pin 2 Input Bias Current
vs. Supply Voltage
CALCULAT ING SE T T LING T IME USING FIGURE 14
T he graph of Figure 14 may be used to closely approximate the
time required for the AD736 to settle when its input level is re-
duced in amplitude. T he
net time
required for the rms converter
to settle will be the
difference
between two times extracted from
the graph – the initial time minus the final settling time. As an
example, consider the following conditions: a 33
μ
F averaging
capacitor, an initial rms input level of 100 mV and a final (re-
duced) input level of 1 mV. From Figure 14, the initial settling
time (where the 100 mV line intersects the 33
μ
F line) is around
80 ms.
T he settling time corresponding to the new or final input level
of 1 mV is approximately 8 seconds. T herefore, the net time for
the circuit to settle to its new value will be 8 seconds minus
80 ms which is 7.92 seconds. Note that, because of the smooth
decay characteristic inherent with a capacitor/diode combina-
tion, this is the total settling time to the final value (i.e.,
not
the
settling time to 1%, 0.1%, etc., of final value). Also, this graph
provides the worst case settling time, since the AD736 will settle
very quickly with increasing input levels.
Figure 11. C
AV
vs. Frequency for
Specified Averaging Error
Figure 14. Settling Time vs. RMS
Input Level for Various
Values of C
AV
Figure 12. RMS Input Level vs.
Frequency for Specified Averag-
ing Error
Figure 15. Pin 2 Input Bias Cur-
rent vs. Temperature
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