参数资料
型号: AD7376AN100
厂商: ANALOG DEVICES INC
元件分类: 数字电位计
英文描述: +-15 V Operation Digital Potentiometer
中文描述: 100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 128 POSITIONS, PDIP14
封装: PLASTIC, DIP-14
文件页数: 1/12页
文件大小: 335K
代理商: AD7376AN100
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD7376*
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1997
*
Patent Number: 5495245
6
15 V Operation
Dgital Potentiometer
FUNCT IONAL BLOCK DIAGRAM
GND
V
DD
SDO
AD7376
7-BIT
SERIAL
REGISTER
D
Q
CK
7
7-BIT
LATCH
R
7
SDI
CLK
CS
A
W
B
V
SS
SHDN
RS
SHDN
FEATURES
128 Position
Potentiometer Replacement
10 k
V
, 50 k
V
, 100 k
V
, 1 M
V
Power Shutdown: Less than 1
m
A
3-Wire SPI Compatible Serial Data Input
+5 V to +30 V Single Supply Operation
6
5 V to
6
15 V Dual Supply Operation
Midscale Preset
APPLICATIONS
Mechanical Potentiometer Replacement
Instrumentation: Gain, Offset Adjustment
Programmable Voltage-to-Current Conversion
Programmable Filters, Delays, Time Constants
Line Impedance Matching
Power Supply Adjustment
GE NE RAL DE SCRIPT ION
T he AD7376 provides a single channel, 128-position digitally-
controlled variable resistor (VR) device. T his device performs the
same electronic adjustment function as a potentiometer or vari-
able resistor. T hese products were optimized for instrument and
test equipment applications where a combination of high voltage
with a choice between bandwidth or power dissipation are avail-
able as a result of the wide selection of end-to-end terminal resis-
tance values. T he AD7376 contains a fixed resistor with a wiper
contact that taps the fixed resistor value at a point determined by
a digital code loaded into the SPI-compatible serial-input regis-
ter. T he resistance between the wiper and either endpoint of the
fixed resistor varies linearly with respect to the digital code trans-
ferred into the VR latch. T he variable resistor offers a completely
programmable value of resistance between the A terminal and the
wiper or the B terminal and the wiper. T he fixed A to B terminal
resistance of 10 k
, 50 k
, 100 k
or 1 M
has a nominal tem-
perature coefficient of –300 ppm/
°
C.
T he VR has its own VR latch which holds its programmed resis-
tance value. T he VR latch is updated from an internal serial-to-
parallel shift register which is loaded from a standard 3-wire
serial-input digital interface. Seven data bits make up the data
word clocked into the serial data input register (SDI). Only the
last seven bits of the data word loaded are transferred into the
7-bit VR latch when the
CS
strobe is returned to logic high. A
serial data output pin (SDO) at the opposite end of the serial
register allows simple daisy-chaining in multiple VR applications
without additional external decoding logic.
T he reset (
RS
) pin forces the wiper to the midscale position by
loading 40
H
into the VR latch. T he
SHDN
pin forces the resistor
to an end-to-end open circuit condition on the A terminal and
shorts the wiper to the B terminal, achieving a microwatt power
shutdown state. When shutdown is returned to logic high, the
previous latch settings put the wiper in the same resistance
setting prior to shutdown as long as power to V
DD
is not re-
moved. T he digital interface is still active in shutdown so that
code changes can be made that will produce a new wiper posi-
tion when the device is taken out of shutdown.
T he AD7376 is available in both surface mount (SOL-16) and
the 14-lead plastic DIP package. For ultracompact solutions
selected models are available in the thin T SSOP package. All
parts are guaranteed to operate over the extended industrial
temperature range of –40
°
C to +85
°
C. For operation at lower
supply voltages (+3 V to +5 V), see the AD8400/AD8402/
AD8403 products.
6
1 LSB ERROR BAND
6
1 LSB
SDI
(DATA IN)
SDO
(DATA OUT)
CLK
CS
V
DD
V
OUT
0V
0
1
0
1
0
1
0
1
D
X
D
X
t
PD_MAX
D'
X
D'
X
t
DS
t
DH
t
CH
t
CSH0
t
CSS
t
CL
t
CS1
t
CSW
t
S
t
CSH
Figure 1. Detail Timing Diagram
T he last seven data bits clocked into the serial input register will
be transferred to the VR 7-bit latch when
CS
returns to logic
high. Extra data bits are ignored.
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