参数资料
| 型号： | AD7607BSTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 18/32页 |
| 文件大小： | 0K |
| 描述： | IC DAS W/ADC 14BIT 8CH 64LQFP |
| 标准包装： | 1 |
| 类型： | 数据采集系统（DAS），ADC |
| 分辨率（位）： | 14 b |
| 采样率（每秒）： | 200k |
| 数据接口： | DSP，MICROWIRE?，并联，QSPI?，串行，SPI? |
| 电压电源： | 模拟和数字 |
| 电源电压： | 2.3 V ~ 5.25 V，4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页当前第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
Data Sheet
AD7607
Rev. B | Page 25 of 32
Figure 42 shows a read of eight simultaneous conversion results
using two DOUT lines on the AD7607. In this case, a 56 SCLK
transfer is used to access data from the AD7607, and CS is held
low to frame the entire 56 SCLK cycles. Data can also be clocked
out using just one DOUT line; in which case, it is recommended
that DOUTA be used to access all conversion data because the
channel data is output in ascending order. For the AD7607 to
access all eight conversion results on one DOUT line, a total of
112 SCLK cycles are required. These 112 SCLK cycles can be
framed by one CS signal, or each group of 14 SCLK cycles can be
individually framed by the CS signal. The disadvantage of using
just one DOUT line is that the throughput rate is reduced
if reading occurs after conversion. The unused DOUT line should
be left unconnected in serial mode. If DOUTB is to be used as a
single DOUT line, the channel results are output in the following
order: V5, V6, V7, V8, V1, V2, V3, and V4; however, the
FRSTDATA indicator returns low after V5 is read on DOUTB.
Figure 6 shows the timing diagram for reading one channel of
data, framed by the CS signal, from the AD7607 in serial mode.
The SCLK input signal provides the clock source for the serial
read operation. The CS goes low to access the data from the
AD7607. The falling edge of CS takes the bus out of three-state
and clocks out the MSB of the 14-bit conversion result. This
MSB is valid on the first falling edge of the SCLK after the CS
falling edge.
The subsequent 13 data bits are clocked out of the AD7607 on the
SCLK rising edge. Data is valid on the SCLK falling edge. To access
each conversion result, 14 clock cycles must be provided.
The FRSTDATA output signal indicates when the first channel,
V1, is being read back. When the CS input is high, the FRSTDATA
output pin is in three-state. In serial mode, the falling edge of CS
takes FRSTDATA out of three-state and sets the FRSTDATA pin
high, indicating that the result from V1 is available on the DOUTA
output data line. The FRSTDATA output returns to a logic low
following the 14th SCLK falling edge. If all channels are read on
DOUTB, the FRSTDATA output does not go high when V1 is output
on this serial data output pin. It goes high only when V1 is available
on DOUTA (and this is when V5 is available on DOUTB).
READING DURING CONVERSION
Data can be read from the AD7607 while BUSY is high and the
conversions are in progress. This has little effect the performance
of the converter, and it allows a faster throughput rate to be
achieved. A parallel, parallel byte, or serial read can be performed
during conversions and when oversampling is or is not enabled.
Figure 3 shows the timing diagram for reading while BUSY is
high in parallel or serial mode. Reading during conversions
allows the full throughput rate to be achieved when using the
serial interface with VDRIVE above 3.3 V.
Data can be read from the AD7607 at any time other than on
the falling edge of BUSY because this is when the output data
registers get updated with the new conversion data. Time t6, as
outlined in Table 3, should be observed in this condition.
V1
V4
V2
V3
V5
V8
V6
V7
SCLK
DOUTA
DOUTB
CS
56
08096-
042
Figure 42. Serial Interface with Two DOUT Lines
相关PDF资料 |
PDF描述 |
|---|---|
| V110A5M200BG3 | CONVERTER MOD DC/DC 5V 200W |
| VI-24N-MY-S | CONVERTER MOD DC/DC 18.5V 50W |
| GTC020R-40-53S | CONN RCPT 60POS BOX MNT W/SCKT |
| GTC02R-40-62S | CONN RCPT 60POS BOX MNT W/SCKT |
| VI-24M-MY-S | CONVERTER MOD DC/DC 10V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD7607BSTZ-RL | 功能描述:IC DAS W/ADC 14BIT 8CH 64LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
| AD7608 | 制造商:AD 制造商全称:Analog Devices 功能描述:8-Channel Differential DAS with 18-Bit |
| AD7608BSTZ | 功能描述:IC DAS W/ADC 18BIT 8CH 64LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Data Converter Basics 标准包装:1 系列:- 类型:电机控制 分辨率（位）:12 b 采样率（每秒）:1M 数据接口:串行，并联 电压电源:单电源 电源电压:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:100-TQFP 供应商设备封装:100-TQFP（14x14） 包装:剪切带 (CT) 其它名称:296-18373-1 |
| AD7608BSTZ-RL | 功能描述:IC DAS W/ADC 18BIT 8CH 64LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
| AD7609 | 制造商:AD 制造商全称:Analog Devices 功能描述:8-Channel Differential DAS with 18-Bit |
发布紧急采购，3分钟左右您将得到回复。