参数资料
型号: AD7652ACPZRL
厂商: Analog Devices Inc
文件页数: 8/28页
文件大小: 0K
描述: IC ADC 16BIT UNIPOLAR 48LFCSP
标准包装: 2,500
系列: PulSAR®
位数: 16
采样率(每秒): 500k
数据接口: 串行,并联
转换器数目: 1
功率耗散(最大): 90mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-VQ(7x7)
包装: 带卷 (TR)
输入数目和类型: 2 个伪差分,单极
配用: EVAL-AD7652CBZ-ND - BOARD EVALUATION FOR AD7652
AD7652
Transfer Functions
Using the OB/2C digital input, the AD7652 offers two output
codings: straight binary and twos complement. The LSB size is
VREF/65536, which is about 38.15 V. The AD7652’s ideal
transfer characteristic is shown in
and
Figure 21. ADC Ideal Transfer Function
Table 7. Output Codes and Ideal Input Voltages
000...000
000...001
000...010
111...101
111...110
111...111
ADC
CODE
(S
tra
ight
Bina
ry
)
ANALOG INPUT
VREF – 1.5 LSB
VREF – 1 LSB
1LSB
0V
0.5 LSB
1 LSB = V REF/65536
02964-0-003
Digital Output Code (Hex)
Description
Analog
Input
Straight
Binary
Twos
Complement
FSR –1 LSB
2.499962 V
FFFF1
7FFF1
FSR – 2 LSB
2.499923 V
FFFE
7FFE
Midscale + 1 LSB
1.250038 V
8001
0001
Midscale
1.25 V
8000
0000
Midscale – 1 LSB
1.249962 V
7FFF
FFFF
–FSR + 1 LSB
38 V
0001
8001
–FSR
0 V
00002
80002
1This is also the code for overrange analog input (VIN – VINGND above
VREF – VREFGND).
2This is also the code for underrange analog input (VIN below VINGND).
NOTES
1THE CONFIGURATION SHOWN IS USING THE INTERNAL REFERENCE AND INTERNAL BUFFER.
2THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.
3OPTIONAL LOW JITTER.
4A 10
F CERAMIC CAPACITOR (X5R, 1206 SIZE) IS RECOMMENDED (e.g., PANASONIC ECJ3YB0J106M).
SEE VOLTAGE REFERENCE INPUT SECTION.
AD7652
D3
CLOCK
C/P/DSP
SERIAL
PORT
DIGITAL SUPPLY
(3.3V OR 5V)
DVDD
100nF
+
10
F
100nF
+
10
F
20
100nF
+
10
F
ANALOG
SUPPLY
(5V)
2.7nF
CC
15
ANALOG INPUT
(0V TO 2.5V)
PD
RESET
SER/PAR
OB/2C
BUSY
SDOUT
SCLK
INGND
IN
REFGND
REF
GND
AVDD
DGND
DVDD
OVDD
OGND
02965-0-004
U12
PDREF
PDBUF
RD
CS
BYTESWAP
CNVST
REFBUFIN1
100nF
CR4
Figure 22. Typical Connection Diagram
Rev. 0 | Page 16 of 28
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