参数资料
| 型号： | AD766AN |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/8页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT W/REF DSP 16-DIP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 1 |
| 系列： | DACPORT® |
| 设置时间： | 1.5µs |
| 位数： | 16 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字，双 ± |
| 功率耗散（最大）： | 300mW |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 16-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 16-PDIP |
| 包装： | 管件 |
| 输出数目和类型： | 2 电流，双极；2 电压，双极 |
| 采样率（每秒）： | 390k |
–7–
REV. A
Applications–AD766
Figure 10. Typical THD vs. Frequency
Figure 11. THD vs. Temperature
INTERFACING THE AD766 TO DIGITAL SIGNAL
PROCESSORS
The AD766 is specifically designed to easily interface to several
popular digital signal processors (DSP) without any additional
logic. Such an interface reduces the possibility of interface prob-
lems and improves system reliability by minimizing component
count.
AD766 TO ADSP-2101
The ADSP-2101 incorporates two complete serial ports which
can be directly interfaced to the AD766 as shown in Figure 12.
The SCLK, TFS and DT outputs of the ADSP-2101 are con-
nected directly to the CLK, LE and DATA inputs of the
AD766, respectively. SCLK is internally generated and can be
programmed to operate from 94 Hz to 6.25 MHz. Data (DT) is
valid on the falling edge of SCLK. After 16 bits have been trans-
mitted, the falling edge of TFS updates the AD766’s data latch.
Using both serial ports of the ADSP-2101, two AD766’s can be
directly interfaced with no additional hardware.
AD766 TO TMS320C25
Figure 13 shows the zero-chip interface to the TMS320C25.
The interface to other TMS320C2X processors is similar. Note
that the C25 should be run in continuous mode. The C25’s
frame synch signal (FSX) will be asserted at the beginning of
each 16-bit word but will actually latch in the previous word.
Figure 12. AD766 to ADSP-2101/ADSP-2102/ ADSP-2105/
ADSP-2111
Figure 13. AD766 to TMS320C25
The CLKS, FSX and DX outputs of the TMS320C25 are con-
nected to the CLK, LE and DATA inputs of the AD766, re-
spectively. Data (DX) is valid on the falling edge of CLKX. The
maximum serial clock rate of the TMS320C25 is 5 MHz.
AD766 TO DSP56000/56001
Figure 14 shows the zero-chip interface to the DSP56000/
56001. The SSI of the 56000/56001 allows serial clock rates up
to fosc/4. SCK, SC2 and STD can be directly connected to the
CLK
, LE and DATA inputs of the AD766. The CRA control
register of the 56000 allows SCK to be internally generated and
software configurable to various divisions of the master clock
frequency. The data (STD) is valid on the falling edge of SCK.
Figure 14. AD766 to DSP56000/DSP56001
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相关代理商/技术参数 |
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| AD766ANZ | 功能描述:IC DAC 16BIT W/REF DSP 16-DIP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:DACPORT® 标准包装:1 系列:- 设置时间:4.5µs 位数:12 数据接口:串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOICN 包装:剪切带 (CT) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:* 其它名称:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD766JN | 功能描述:IC DAC 16BIT W/VREF 16-DIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:DACPORT® 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散（最大）:100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC（J 形引线） 供应商设备封装:28-PLCC（11.51x11.51） 包装:带卷 (TR) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:143k |
| AD766JNZ | 功能描述:IC DAC 16BIT W/VREF 16-DIP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:DACPORT® 标准包装:1 系列:- 设置时间:4.5µs 位数:12 数据接口:串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOICN 包装:剪切带 (CT) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:* 其它名称:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD766SD/883B | 功能描述:数模转换器- DAC 16-BIT DSP DAC IC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
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