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参数资料
| 型号： | AD7680BRMZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT LP UNIPOLAR 8-MSOP |
| 标准包装： | 50 |
| 系列： | PulSAR® |
| 位数： | 16 |
| 采样率（每秒）： | 100k |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 26.4mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，单极 |
| 产品目录页面： | 778 (CN2011-ZH PDF) |
AD7680
Rev. A | Page 14 of 24
MODES OF OPERATION
The mode of operation of the AD7680 is selected by controlling
the (logic) state of the CS signal during a conversion. There are
two possible modes of operation, normal and power-down. The
point at which CS is pulled high after the conversion has been
initiated determines whether or not the AD7680 enters power-
down mode. Similarly, if the AD7680 is already in power-down,
CS can control whether the device returns to normal operation
or remains in power-down. These modes of operation are
designed to provide flexible power management options. These
options can optimize the power dissipation/throughput rate
ratio for differing application requirements.
NORMAL MODE
This mode provides the fastest throughput rate performance,
because the user does not have to worry about the power-up
times with the AD7680 remaining fully powered all the time.
Figure 16 shows the general diagram of the operation of the
AD7680 in this mode.
The conversion is initiated on the falling edge of CS as described
in the
section. To ensure that the part remains
fully powered up at all times,
CS must remain low until at least
10 SCLK falling edges have elapsed after the falling edge of CS.
If CS is brought high any time after the 10th SCLK falling edge,
but before the 20th SCLK falling edge, the part remains
powered up, but the conversion is terminated and SDATA goes
back into three-state. At least 20 serial clock cycles are required
to complete the conversion and access the complete conversion
result. In addition, a total of 24 SCLK cycles accesses four
trailing zeros. CS may idle high until the next conversion or
may idle low until CS returns high sometime prior to the next
conversion, effectively idling CS low.
Once a data transfer is complete (SDATA has returned to three-
state), another conversion can be initiated after the quiet time,
tQUIET, has elapsed by bringing CS low again.
03643-0-009
110
20
4 LEADING ZEROS + CONVERSION RESULT
CS
SCLK
SDATA
Figure 16. Normal Mode Operation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD7680BRMZ | 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7680 MSOP8 |
| AD7680BRMZ-REEL | 功能描述:IC ADC 16BIT LP UNIPOLR 8MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:PulSAR® 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
| AD7680BRMZ-REEL7 | 功能描述:IC ADC 16BIT LP UNIPOLR 8MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:PulSAR® 标准包装:1,000 系列:- 位数:16 采样率（每秒）:45k 数据接口:串行 转换器数目:2 功率耗散（最大）:315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端，单极 |
| AD7682 | 制造商:AD 制造商全称:Analog Devices 功能描述:14-Bit, 8-Channel, 250 kSPS PulSAR ADC |
| AD7682BCBZ-RL7 | 功能描述:16 Bit Analog to Digital Converter 4 Input 1 SAR 20-WLCSP (2.39x2.39) 制造商:analog devices inc. 系列:PulSAR? 包装:带卷（TR） 零件状态:有效 位数:16 采样率（每秒）:250k 输入数:4 输入类型:差分，单端 数据接口:SPI，DSP 配置:MUX-S/H-ADC 无线电 - S/H:ADC:1:1 A/D 转换器数:1 架构:SAR 参考类型:外部， 内部 电压 - 电源，模拟:2.3 V ~ 5.5 V 电压 - 电源，数字:* 特性:温度传感器 工作温度:-40°C ~ 85°C 封装/外壳:20-UFBGA，WLCSP 供应商器件封装:20-WLCSP（2.39x2.39） 标准包装:1,500 |
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