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| 型号： | AD7711AARZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT RTD I SOURCE 24SOIC |
| 标准包装： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 1.03k |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 52.5mW |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC W |
| 包装： | 管件 |
| 输入数目和类型： | 2 个差分，单极；2 个差分，双极 |
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2
AD7711A
–19–
REV. D
In the bipolar mode, the system offset calibration range is again
restricted by the span range. The span range of the converter in
bipolar mode is equidistant around the voltage used for the zero-
scale point, thus the offset range plus half the span range cannot
exceed (1.05
VREF/GAIN). If the span is set to 2 VREF/GAIN,
the offset span cannot move more than
±(0.05 VREF/GAIN)
before the endpoints of the transfer function exceed the input
overrange limits
±(1.05 VREF/GAIN). If the span range is set
to the minimum
±(0.4 VREF/GAIN), the maximum allowable
offset range is
±(0.65 VREF/GAIN).
POWER-UP AND CALIBRATION
On power-up, the AD7711A performs an internal reset, which
sets the contents of the control register to a known state. How-
ever, to ensure correct calibration for the device, a calibration
routine should be performed after power-up.
The power dissipation and temperature drift of the AD7711A
are low and no warm-up time is required before the initial cali-
bration is performed. However, if an external reference is being
used, this reference must have stabilized before calibration is
initiated.
Drift Considerations
The AD7711A uses chopper stabilization techniques to mini-
mize input offset drift. Charge injection in the analog switches
and dc leakage currents at the sampling node are the primary
sources of offset voltage drift in the converter. The dc input
leakage current is essentially independent of the selected gain.
Gain drift within the converter depends primarily upon the
temperature tracking of the internal capacitors. It is not affected
by leakage currents.
Measurement errors due to offset drift or gain drift can be elimi-
nated at any time by recalibrating the converter or by operating
the part in the background calibration mode. Using the system
calibration mode can also minimize offset and gain errors in the
signal conditioning circuitry. Integral and differential linearity
errors are not significantly affected by temperature changes.
POWER SUPPLIES AND GROUNDING
Since the analog inputs and reference input are differential,
most of the voltages in the analog modulator are common-mode
voltages. VBIAS provides the return path for most of the analog
currents flowing in the analog modulator. As a result, the VBIAS
input should be driven from a low impedance to minimize errors
due to charging/discharging impedances on this line. When the
internal reference is used as the reference source for the part,
AGND is the ground return for this reference voltage.
Table VI. Calibration Truth Table
Cal Type
MD2, MD1, MD0
Zero-Scale Cal
Full-Scale Cal
Sequence
Duration
Self-Cal
0, 0, 1
Shorted Inputs
VREF
One-Step
9
1/Output Rate
System Cal
0, 1, 0
AIN
–
Two-Step
4
1/Output Rate
System Cal
0, 1, 1
–
AIN
Two-Step
4
1/Output Rate
System Offset Cal
1, 0, 0
AIN
VREF
One-Step
9
1/Output Rate
Background Cal
1, 0, 1
Shorted Inputs
VREF
One-Step
6
1/Output Rate
The analog and digital supplies to the AD7711A are indepen-
dent and separately pinned out to minimize coupling between
the analog and digital sections of the device. The digital filter
will provide rejection of broadband noise on the power supplies,
except at integer multiples of the modulator sampling frequency.
The digital supply (DVDD) must not exceed the analog positive
supply (AVDD) by more than 0.3 V in normal operation. If sepa-
rate analog and digital supplies are used, the decoupling scheme
shown in Figure 9 is recommended. In systems where AVDD =
5 V and DVDD = 5 V, it is recommended that AVDD and DVDD
are driven from the same 5 V supply, although each supply
should be decoupled separately as shown in Figure 9. It is pref-
erable that the common supply is the system’s analog 5 V supply.
It is also important that power is applied to the AD7711A before
signals at REF IN, AIN, or the logic input pins in order to avoid
excessive current. If separate supplies are used for the AD7711A
and the system digital circuitry, then the AD7711A should be
powered up first. If it is not possible to guarantee this, then
current limiting resistors should be placed in series with the
logic inputs.
AD7711A
AVDD
DVDD
0.1 F
10 F
ANALOG
SUPPLY
0.1 F
DIGITAL +5V
SUPPLY
Figure 9. Recommended Decoupling Scheme
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| AD7711AN | 功能描述:IC ADC 24BIT RTD I SOURCE 24-DIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| AD7711ANZ | 功能描述:IC ADC 24BIT RTD I SOURCE 24-DIP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 其它有关文件:TSA1204 View All Specifications 标准包装:1 系列:- 位数:12 采样率（每秒）:20M 数据接口:并联 转换器数目:2 功率耗散（最大）:155mW 电压电源:模拟和数字 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-TQFP 供应商设备封装:48-TQFP（7x7） 包装:Digi-Reel® 输入数目和类型:4 个单端，单极；2 个差分，单极 产品目录页面:1156 (CN2011-ZH PDF) 其它名称:497-5435-6 |
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| AD7711AQ | 功能描述:IC ADC 24BIT RTD I SOURCE 24CDIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
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