参数资料
型号: AD7765BRUZ-REEL7
厂商: Analog Devices Inc
文件页数: 1/33页
文件大小: 0K
描述: IC ADC 24BIT S/D 156KSPS 28TSSOP
标准包装: 1,000
位数: 24
采样率(每秒): 156k
数据接口: 串行,SPI?
转换器数目: 1
功率耗散(最大): 371mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 带卷 (TR)
输入数目和类型: 1 个差分,单极;1 个差分,双极
24-Bit, 156 kSPS, 112 dB Sigma-Delta ADC
with On-Chip Buffers and Serial Interface
AD7765
Rev. A
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FEATURES
High performance, 24-bit Σ-Δ ADC
115 dB dynamic range at 78 kHz output data rate
112 dB dynamic range at 156 kHz output data rate
156 kHz maximum fully filtered output word rate
Pin-selectable oversampling rate (128× and 256×)
Low power mode
Flexible SPI
Fully differential modulator input
On-chip differential amplifier for signal buffering
On-chip reference buffer
Full band low-pass finite impulse response (FIR) filter
Overrange alert pin
Digital gain correction registers
Power-down mode
Synchronization of multiple devices via SYNC
APPLICATIONS
pin
Daisy chaining
Data acquisition systems
Vibration analysis
Instrumentation
GENERAL DESCRIPTION
The AD7765 is a high performance, 24-bit sigma-delta (Σ-Δ)
analog-to-digital converter (ADC). It combines wide input
bandwidth, high speed, and performance of 112 dB dynamic
range at a 156 kHz output data rate. With excellent dc
specifications, the converter is ideal for high speed data
acquisition of ac signals where dc data is also required.
Using the AD7765 eases the front-end antialias filtering
requirements, simplifying the design process significantly. The
AD7765 offers pin-selectable decimation rates of 128× and
256×. Other features include an integrated buffer to drive the
reference, as well as a fully differential amplifier to buffer and
level shift the input to the modulator.
An overrange alert pin indicates when an input signal has
exceeded the acceptable range. The addition of internal gain
and internal overrange registers makes the AD7765 a compact,
highly integrated data acquisition device requiring minimal
peripheral components.
The AD7765 also offers a low power mode, significantly
reducing power dissipation without reducing the output data
rate or available input bandwidth.
FUNCTIONAL BLOCK DIAGRAM
REFGND
VREF+
BUF
VOUTA– VOUTA+ VIN+ VIN
MCLK
GND
OVERRANGE
DEC_RATE
AVDD1
AVDD2
AVDD3
AVDD4
DVDD
RBIAS
SYNC
RESET/PWRDWN
VINA+
VINA–
FSO SCO
SDI
SDO
FSI
DIFF
MULTIBIT
Σ-Δ
MODULATOR
RECONSTRUCTION
DECIMATION
FIR FILTER ENGINE
AD7765
INTERFACE LOGIC AND
OFFSET AND GAIN
CORRECTION REGISTERS
06519-
001
Figure 1.
The differential input is sampled at up to 40 MSPS by an analog
modulator. The modulator output is processed by a series of
low-pass filters. The external clock frequency applied to the
AD7765 determines the sample rate, filter corner frequencies,
and output word rate.
The AD7765 device boasts a full band on-board FIR filter. The
full stop-band attenuation of the filter is achieved at the Nyquist
frequency. This feature offers increased protection from signals
that lie above the Nyquist frequency being aliased back into the
input signal bandwidth.
The reference voltage supplied to the AD7765 determines the
input range. With a 4 V reference, the analog input range is
±3.2768 V differential, biased around a common mode of
2.048 V. This common-mode biasing can be achieved using
the on-chip differential amplifier, further reducing the external
signal conditioning requirements.
The AD7765 is available in a 28-lead TSSOP package and is
specified over the industrial temperature range of 40°C
to +85°C.
Table 1. Related Devices
Part No.
Description
2.5 MSPS, 100 dB, parallel output, on-chip buffers
625 kSPS, 109 dB, parallel output, on-chip buffers
625 kSPS, 109 dB, serial output, on-chip buffers
312 kSPS, 109 dB, serial output, on-chip buffers
128/64/32 kSPS, 8.5 mW, 109 dB SNR
128/64/32 kSPS, 8.5 mW, 109 dB SNR
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