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参数资料
| 型号： | AD7788BRM |
| 厂商： | Analog Devices Inc |
| 文件页数： | 17/20页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT LP 10-MSOP |
| 标准包装： | 50 |
| 位数： | 16 |
| 采样率（每秒）： | 16.6 |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 230µW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 管件 |
| 输入数目和类型： | 1 个差分，单极；1 个差分，双极 |
AD7788/AD7789
Rev. B | Page 6 of 20
TIMING CHARACTERISTICS
VDD = 2.5 V to 5.25 V (AD7788B and AD7789); VDD = 2.7 V to 5.25 V (AD7788A); GND = 0 V; REFIN(+) = 2.5 V; REFIN() = GND;
Input Logic 0 = 0 V; Input Logic 1 = VDD, unless otherwise noted.
Table 4.
Limit at TMIN, TMAX (B Version)
Unit
Description
t3
100
ns min
SCLK high pulse width
t4
100
ns min
SCLK low pulse width
Read Operation
t1
0
ns min
CS falling edge to DOUT/RDY active time
60
ns max
VDD = 4.75 V to 5.25 V
80
ns max
VDD = 2.7 V to 3.6 V
t23
0
ns min
SCLK active edge to data valid delay4
60
ns max
VDD = 4.75 V to 5.25 V
80
ns max
VDD = 2.7 V to 3.6 V
10
ns min
Bus relinquish time after CS inactive edge
80
ns max
t6
0
ns min
SCLK inactive edge to CS inactive edge
t7
10
ns min
SCLK inactive edge to DOUT/RDY high
Write Operation
t8
0
ns min
CS falling edge to SCLK active edge setup time4
t9
30
ns min
Data valid to SCLK edge setup time
t10
25
ns min
Data valid to SCLK edge hold time
t11
0
ns min
CS rising edge to SCLK edge hold time
1 Sample tested during initial release to ensure compliance. All input signals are specified with tR = tF = 5 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V.
3 These numbers are measured with the load circuit of, and defined as, the time required for the output to cross the VOL or VOH limits.
4 SCLK active edge is the falling edge of SCLK.
5 These numbers are derived from the measured time taken by the data output to change 0.5 V when loaded with the circuit of Figure 2. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the Timing Characteristics are the true
bus relinquish times of the part and, as such, are independent of external bus loading capacitances.
6
RDY returns high after a read of the ADC. In single-conversion mode and continuous-conversion mode, the same data can be read again, if required, while RDY is high,
although care should be taken to ensure that subsequent reads do not occur close to the next output update. In continuous read mode, the digital word can be read
only once.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD7788BRM-REEL | 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 16.6sps 16-bit Serial 10-Pin MSOP T/R 制造商:Analog Devices 功能描述:ADC SGL DELTA-SIGMA 0.0166KSPS 16BIT SERL 10MSOP - Tape and Reel |
| AD7788BRMZ | 功能描述:IC ADC 16BIT LP 10-MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:microPOWER™ 位数:8 采样率（每秒）:1M 数据接口:串行，SPI? 转换器数目:1 功率耗散（最大）:- 电压电源:模拟和数字 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:24-VFQFN 裸露焊盘 供应商设备封装:24-VQFN 裸露焊盘（4x4） 包装:Digi-Reel® 输入数目和类型:8 个单端，单极 产品目录页面:892 (CN2011-ZH PDF) 其它名称:296-25851-6 |
| AD7788BRMZ | 制造商:Analog Devices 功能描述:IC SM 16-BIT ADC |
| AD7788BRMZ1 | 制造商:AD 制造商全称:Analog Devices 功能描述:Low Power, 16-/24-Bit, Sigma-Delta ADCs |
| AD7788BRMZ-REEL | 功能描述:IC ADC 16BIT SIGMA-DELTA 10MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:2,500 系列:- 位数:16 采样率（每秒）:15 数据接口:MICROWIRE?，串行，SPI? 转换器数目:1 功率耗散（最大）:480µW 电压电源:单电源 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:38-WFQFN 裸露焊盘 供应商设备封装:38-QFN（5x7） 包装:带卷 (TR) 输入数目和类型:16 个单端，双极；8 个差分，双极 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
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