参数资料
型号: AD7829BRZ-REEL7
厂商: Analog Devices Inc
文件页数: 8/28页
文件大小: 0K
描述: IC ADC 8BIT 8CH 2MSPS 28-SOIC
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 400
位数: 8
采样率(每秒): 2M
数据接口: 并联
转换器数目: 1
功率耗散(最大): 36mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 带卷 (TR)
输入数目和类型: 8 个单端,单极
AD7822/AD7825/AD7829
Rev. C | Page 16 of 28
Mode 2 Operation (Automatic Power-Down)
When the AD7822/AD7825/AD7829 are operated in Mode 2
(see Figure 25), they automatically power down at the end of
a conversion. The CONVST signal is brought low to initiate
a conversion and is left logic low until after the EOC goes high,
that is, approximately 100 ns after the end of the conversion.
The state of the CONVST signal is sampled at this point (that is,
530 ns maximum after CONVST falling edge), and the AD7822/
AD7825/AD7829 power down as long as CONVST is low.
The ADC is powered up again on the rising edge of the
CONVST signal. Superior power performance can be achieved
in this mode of operation by powering up the AD7822/AD7825/
AD7829 only to carry out a conversion. The parallel interface of
the AD7822/AD7825/AD7829 remains fully operational while
the ADCs are powered down. A read may occur while the part
is powered down, and, therefore, it does not necessarily need to
be placed within the EOC pulse, as shown in Figure 25.
t2
t1
t3
VALID
DATA
CONVST
EOC
CS
RD
DB0 TO DB7
TRACK
HOLD
TRACK
HOLD
120ns
01
32
1-
0
25
Figure 24. Mode 1 Operation
CONVST
EOC
CS
RD
DB0 TO DB7
tPOWER-UP
t1
VALID
DATA
POWER
DOWN
HERE
01
32
1-
0
26
Figure 25. Mode 2 Operation
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