参数资料
| 型号： | AD7841BSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/13页 |
| 文件大小： | 0K |
| 描述： | IC DAC 14BIT OCTAL V-OUT 44-MQFP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 1 |
| 设置时间： | 31µs |
| 位数： | 14 |
| 数据接口： | 并联 |
| 转换器数目： | 8 |
| 电压电源： | 模拟和数字，双 ± |
| 功率耗散（最大）： | 303mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-QFP |
| 供应商设备封装： | 44-MQFP（10x10） |
| 包装： | 托盘 |
| 输出数目和类型： | 8 电压，单极；8 电压，双极 |
| 采样率（每秒）： | 32k |
| 产品目录页面： | 785 (CN2011-ZH PDF) |
| 配用： | EVAL-AD7841EBZ-ND - BOARD EVAL FOR AD7841 |
AD7841
–4–
ABSOLUTE MAXIMUM RATINGS
1, 2
(TA = 25
°C unless otherwise noted)
VCC to GND
3
. . . . . . . . . . . . . . –0.3 V, +7 V or VDD + 0.3 V
(Whichever Is Lower)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +17 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, –17 V
Digital Inputs to GND . . . . . . . . . . . . . . –0.3 V, VCC + 0.3 V
VREF(+) to VREF(–) . . . . . . . . . . . . . . . . . . . . . –0.3 V, +18 V
VREF(+) to GND . . . . . . . . . . . . . . . VSS – 0.3 V, VDD + 0.3 V
VREF(–) to GND . . . . . . . . . . . . . . . VSS – 0.3 V, VDD + 0.3 V
DUTGND to GND . . . . . . . . . . . . . VSS – 0.3 V, VDD + 0.3 V
VOUT (A–H) to GND . . . . . . . . . . . . VSS – 0.3 V, VDD + 0.3 V
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . .
–40
°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150
°C
MQFP Package
Power Dissipation . . . . . . . . . . . . . . . . . (TJ Max – TA)/
θJA
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 95°C/W
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Transient currents of up to 100 mA will not cause SCR latch-up.
3V
CC must not exceed VDD by more than 0.3 V. If it is possible for this to happen
during power supply sequencing, the following diode protection scheme will ensure
protection.
PIN CONFIGURATION
3
4
5
6
7
1
2
10
11
8
9
40
39
38
41
42
43
44
36
35
34
37
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
12
13
14
15
16
17
18
19
20
21
22
29
30
31
32
33
27
28
25
26
23
24
DUTGND_GH
VOUTH
VREF(–)GH
VREF(+)GH
CLR
DB13
DB12
AD7841
DUTGND_AB
VOUTA
VREF(–)AB
VREF(+)AB
VDD
VSS
LDAC
A2
A1
A0
CS
DB11
DB10
DB9
DB8
DB4
V
OUT
B
V
OUT
C
DUTGND_CD
V
OUT
D
V
DD
V
OUT
E
DUTGND_EF
V
OUT
F
V
OUT
G
DB7
DB5
DB6
DB2
WR
V
CC
GND
DB0
DB1
DB3
V
REF
(–
)CDEF
V
REF
(+)CDEF
VDD
VCC
AD7841
HP5082-2811
VDD
VCC
IN4148
REV. B
Lead Temperature ............................JEDEC Industry Standard
Soldering ......................................................................J-STD-020
ESD .................................................................................. >4000 V
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