参数资料
型号: AD7984BCPZ-RL
厂商: Analog Devices Inc
文件页数: 9/24页
文件大小: 0K
描述: IC ADC 18BIT 1.33MSPS 10LFCSP
设计资源: Converting a Single-Ended Signal with AD7984 Differential PulSAR ADC (CN0033)
标准包装: 5,000
系列: PulSAR®
位数: 18
采样率(每秒): 1.33M
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 14mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘,CSP
供应商设备封装: 10-LFCSP-WD(3x3)
包装: 带卷 (TR)
输入数目和类型: 1 个差分,单极
AD7984
Rev. A | Page 17 of 24
CS MODE, 3-WIRE WITHOUT BUSY INDICATOR
This mode is usually used when a single AD7984 is connected
to an SPI-compatible digital host. The connection diagram is
shown in Figure 28, and the corresponding timing is given in
With SDI tied to VIO, a rising edge on CNV initiates a
conversion, selects the CS mode, and forces SDO to high
impedance. When a conversion is initiated, it continues until
completion irrespective of the state of CNV. This can be useful,
for example, to bring CNV low to select other SPI devices, such
as analog multiplexers; however, CNV must be returned high
before the minimum conversion time elapses and then held
high for the maximum possible conversion time to avoid the
generation of the busy signal indicator. When the conversion is
complete, the AD7984 enters the acquisition phase and goes
into standby mode. When CNV goes low, the MSB is output
onto SDO. The remaining data bits are clocked by subsequent
SCK falling edges. The data is valid on both SCK edges. Although
the rising edge can be used to capture the data, a digital host
using the SCK falling edge allows a faster reading rate, provided
it has an acceptable hold time. After the 18th SCK falling edge or
when CNV goes high (whichever occurs first), SDO returns to
high impedance.
AD7984
SDI
SDO
CNV
SCK
CONVERT
DATA IN
CLK
DIGITAL HOST
VIO
06
97
3-
0
18
Figure 28. CS Mode, 3-Wire Without Busy Indicator Connection Diagram (SDI High)
SDO
D17
D16
D15
D1
D0
tDIS
SCK
1
2
3
16
17
18
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
CNV
CONVERSION
ACQUISITION
tCONV
tCYC
ACQUISITION
SDI = 1
tCNVH
tACQ
tEN
06
97
3-
0
19
Figure 29. CS Mode, 3-Wire Without Busy Indicator Serial Interface Timing (SDI High)
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