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参数资料
| 型号： | AD8054 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Low Cost, High Speed Rail-to-Rail Amplifiers(低成本,高速满幅度四放大器) |
| 中文描述： | 低成本，高速轨到轨放大器（低成本，高速满幅度四放大器） |
| 文件页数： | 14/16页 |
| 文件大小： | 256K |
| 代理商： | AD8054 |
AD8051/AD8052/AD8054
–14–
REV. 0
AD8051
+5V
0.1
m
F
10
m
F
10
m
F
0.1
m
F
V
REF
AVDD
SELECT
INA-I
1
V
DD
10pF
CLK
SLEEP
D9
D1
D2
D3
D4
D5
D6
D7
D0
DVDD
AVSS
REFSENSE
AD9201
DVSS
THREE–STATE
INB-I
REFT-I
REFB-I
REFB-Q
REFT-Q
INB-Q
INA-Q
D8
1
5V
DATA OUT
0.1
m
F
22
V
10pF
22
V
10
m
F
0.1
m
F
1
5V
0.1
m
F
10
m
F
0.1
m
F
22
V
22
V
2
5V
22
V
1k
V
50
V
1k
V
10pF
10pF
0.1
m
F
10
m
F
0.1
m
F
0.1
m
F
10
m
F
0.1
m
F
1k
V
0.1
m
F
10
m
F
0.01
m
F
0.33
m
F
Figure 44. AD8051 Driving an AD9201, a 10-Bit 20 MSPS A/D Converter
applied to the noninverting input of the AD8051. T he amplifier
output is 2 V p-p, which is the maximum input range of the
AD9201. T he 22
series resistor limits the maximum current
that flows and helps to lower the distortion of the A/D.
T he AD9201 has differential inputs for each channel. T hese are
designated the A and B inputs. T he B inputs of each channel are
connected to VREF (Pin 8) which supplies a positive reference
of 2.5 V. Each of the B inputs has a small low pass filter that
also helps to reduce distortion.
T he output of the op amp is ac coupled into INA-I (Pin 2) via
two parallel capacitors to provide good high frequency and low
frequency coupling. T he 1 k
resistor references the signal to
VREF that is applied to INB-I. T hus, INA-I will swing both
positive and negative with respect to the bias voltage applied to
INB-I.
With the sampling clock running at 20 MSPS, the A/D output
was analyzed with a digital analyzer. T wo input frequencies
were used, 1 MHz and 9.5 MHz, which is just short of the
Nyquist frequency. T hese signals were well filtered to minimize
any harmonics.
Figure 45 shows the FFT response of the A/D for the case of
1 MHz analog input. T he SFDR is 71.66 dB and the A/D is
producing 8.8 ENOB (effective number of bits). When the
analog frequency was raised to 9.5 MHz, the SFDR was re-
duced to 60.18 dB and the A/D operated with 8.46 ENOBs as
shown in Figure 46. T he inclusion of the AD8051 in the circuit
had no worsening of the distortion performance of the AD9201.
PART#
0
FCLK
FUND
VIN
THD
SNR
SINAD
ENOB
SFDR
2ND
3RD
4TH
5TH
6TH
7TH
8TH
9TH
FFTSIZE 8192
20.0E
1
6
998.5E
1
3
2
0.51dB
2
68.13
54.97
54.76
8.80
2
71.66
2
74.53
2
76.06
2
76.35
2
79.05
2
80.36
2
75.08
2
88.12
2
77.87
10.0
5.0
0.0
2
5.0
2
10.0
2
15.0
2
20.0
2
25.0
2
30.0
2
35.0
2
40.0
2
45.0
2
50.0
2
55.0
2
60.0
2
65.0
2
70.0
2
75.0
2
80.0
2
85.0
2
90.0
2
95.0
2
100.0
2
105.0
2
110.0
2
115.0
2
120.0
0.0E
1
0
1.0E
1
6
2.0E
1
6
3.0E
1
6
4.0E
1
6
5.0E
1
6
6.0E
1
6
7.0E
1
6
8.0E
1
6
9.0E
1
6
10.0E
1
6
2ND
3RD
4TH
5TH
6TH
7TH
8TH
9TH
FUND
Figure 45. FFT Plot for AD8051 Driving the AD9201 at
1 MHz
FUND
3RD
4TH
6TH
7TH
8TH
2ND
PART# 0
FFTSIZE 8192
FCLK
FUND
VIN
THD
SNR
SINAD
ENOB
SFDR
2ND
3RD
4TH
5TH
6TH
7TH
8TH
9TH
20.0E
1
6
9.5E
1
6
2
0.44dB
2
57.08
54.65
52.69
8.46
2
60.18
2
60.18
2
60.23
2
82.01
2
78.83
2
81.28
2
77.28
2
84.54
2
92.78
10.0
5.0
0.0
2
5.0
2
10.0
2
15.0
2
20.0
2
25.0
2
30.0
2
35.0
2
40.0
2
45.0
2
50.0
2
55.0
2
60.0
2
65.0
2
70.0
2
75.0
2
80.0
2
85.0
2
90.0
2
95.0
2
100.0
2
105.0
2
110.0
2
115.0
2
120.0
0.0E
1
0
1.0E
1
6
2.0E
1
6
3.0E
1
6
4.0E
1
6
5.0E
1
6
6.0E
1
6
7.0E
1
6
8.0E
1
6
9.0E
1
6
10.0E
1
6
Figure 46. FFT Plot for AD8051 Driving the AD9201 at
9.5 MHz
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