参数资料
型号: AD8075Z-EVAL
厂商: Analog Devices Inc
文件页数: 3/15页
文件大小: 0K
描述: BOARD EVAL FOR AD8075
应用说明: Using the Active Filter Design Tool, AN-649
标准包装: 1
主要目的: 视频,放大器,三路
嵌入式:
已用 IC / 零件: AD8075
主要属性: 缓冲器,550MHz(200 mV),1350 V/us 转换速率
次要属性: +/- 4.5 ~ 5.5 V,< 30 mA
已供物品:
相关产品: AD8075ARUZ-REEL7-ND - IC TRPL VID BUFF 500MHZ 16-TSSOP
AD8075ARUZ-REEL-ND - IC TRPL VID BUFF 500MHZ 16-TSSOP
AD8075ARUZ-ND - IC TRPL VID BUFF 500MHZ 16-TSSOP
AD8074/AD8075
–11–
Triple Video Multiplexer
The AD8074 and AD8075 each have an output-enable function
that can be used to disable the outputs and put them in a high-
impedance state. Usually, for a unity-gain device, it is relatively
easy to provide high disabled impedance, because the feedback
path is from the output to a high-impedance input. However, for a
non-unity-gain part, the feedback provides a resistive path to
ground. This will usually dominate the disabled output imped-
ance, and make it a much lower value than the unity-gain device.
The AD8075 has an internal buffer that provides a low-impedance,
ground level output that terminates the feedback path during
enabled operation. In the disabled state, both this buffer output
and the amplifier output are disabled to a high impedance to
provide a high-impedance disabled state.
To construct a multiplexer, the outputs from one or more devices
are connected in parallel and only one device is enabled at a
time while all of the others are disabled. The two sets of inputs
are applied individually to each of the separate device inputs.
Figure 4 shows the circuit details for this function. The first RGB
Source 1 is input to the first AD8075. Each of the individual
signals is terminated to ground with 75
to provide proper
termination for the input cables. In a similar fashion, the Source
2 signals are input to the second AD8075.
0.1 F
–5V
0.1 F
–5V
0.1 F
–5V
+
25 F
0.1 F
+5V
0.1 F
+5V
0.1 F
+5V
+
25 F
AD8075
75
OE
75
R
G
B
SOURCE 2
0.1 F
–5V
0.1 F
–5V
0.1 F
–5V
+
25 F
0.1 F
+5V
0.1 F
+5V
0.1 F
+5V
+
25 F
AD8075
75
OE
75
R
G
B
SOURCE 1
SEL1/
SEL2
R
G
B
OUTPUT
Figure 4. Mux
Rev. B
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