参数资料
型号: AD812ARZ
厂商: Analog Devices Inc
文件页数: 4/16页
文件大小: 0K
描述: IC OPAMP DUAL CURR-FDBK 8-SOIC
标准包装: 98
应用: 电流反馈
电路数: 2
-3db带宽: 145MHz
转换速率: 1600 V/µs
电流 - 电源: 4.5mA
电流 - 输出 / 通道: 50mA
电压 - 电源,单路/双路(±): 2.4 V ~ 36 V,±1.2 V ~ 18 V
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
产品目录页面: 769 (CN2011-ZH PDF)
AD812
REV. B
–12–
General Considerations
The AD812 is a wide bandwidth, dual video amplifier which
offers a high level of performance on less than 5.5 mA per am-
plifier of quiescent supply current. It is designed to offer out-
standing performance at closed-loop inverting or noninverting
gains of one or greater.
Built on a low cost, complementary bipolar process, and achiev-
ing bandwidth in excess of 100 MHz, differential gain and phase
errors of better than 0.1% and 0.1
° (into 150 ), and output
current greater than 40 mA, the AD812 is an exceptionally
efficient video amplifier. Using a conventional current feedback
architecture, its high performance is achieved through careful
attention to design details.
Choice of Feedback and Gain Resistors
Because it is a current feedback amplifier, the closed-loop band-
width of the AD812 depends on the value of the feedback resis-
tor. The bandwidth also depends on the supply voltage. In
addition, attenuation of the open-loop response when driving
load resistors less than about 250
will affect the bandwidth.
Table I contains data showing typical bandwidths at different
supply voltages for some useful closed-loop gains when driving a
load of 150
. (Bandwidths will be about 20% greater for load
resistances above a few hundred ohms.)
The choice of feedback resistor is not critical unless it is impor-
tant to maintain the widest, flattest frequency response. The
resistors recommended in the table are those (metal film values)
that will result in the widest 0.1 dB bandwidth. In those appli-
cations where the best control of the bandwidth is desired, 1%
metal film resistors are adequate. Wider bandwidths can be
attained by reducing the magnitude of the feedback resistor (at
the expense of increased peaking), while peaking can be reduced
by increasing the magnitude of the feedback resistor.
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and
Feedback Resistor (RL = 150
)
V
S (V)
Gain
R
F (
)
BW (MHz)
±15
+1
866
145
+2
715
100
+10
357
65
–1
715
100
–10
357
60
± 5
+1
750
90
+2
681
65
+10
154
45
–1
715
70
–10
154
45
+5
+1
750
60
+2
681
50
+10
154
35
–1
715
50
–10
154
35
+3
+1
750
50
+2
681
40
+10
154
30
–1
715
40
–10
154
25
To estimate the –3 dB bandwidth for closed-loop gains or feed-
back resistors not listed in the above table, the following two
pole model for the AD812 many be used:
A
G
S
RGrC
f
S R
Gr
C
CL
FIN
T
FIN
T
=
+
()
++
() +
2
1
π
where:
ACL = closed-loop gain
G
= 1 + RF/RG
rIN = input resistance of the inverting input
CT = “transcapacitance,” which forms the open-loop
dominant pole with the tranresistance
RF = feedback resistor
RG = gain resistor
f2
= frequency of second (nondominant) pole
S
= 2
πj f
Appropriate values for the model parameters at different supply
voltages are listed in Table II. Reasonable approximations for
these values at supply voltages not found in the table can be
obtained by a simple linear interpolation between those tabu-
lated values which “bracket” the desired condition.
Table II. Two-Pole Model Parameters at Various
Supply Voltages
V
S
r
IN (
)C
T (pF)
f
2 (MHz)
±15
85
2.5
150
±5
90
3.8
125
+5
105
4.8
105
+3
115
5.5
95
As discussed in many amplifier and electronics textbooks (such
as Roberge’s Operational Amplifiers: Theory and Practice), the
–3 dB bandwidth for the 2-pole model can be obtained as:
f3 = fN [1 – 2d
2 + (2 – 4d2 + 4d4)1/2]1/2
where:
f
RGr
C
N
FIN
T
=
+
()
2
12
/
and:
d = (1/2) [f2 (RF + GrIN) CT]
1/2
This model will predict –3 dB bandwidth within about 10 to
15% of the correct value when the load is 150
. However, it is
not an accurate enough to predict either the phase behavior or
the frequency response peaking of the AD812.
Printed Circuit Board Layout Guidelines
As with all wideband amplifiers, printed circuit board parasitics
can affect the overall closed-loop performance. Most important
for controlling the 0.1 dB bandwidth are stray capacitances at
the output and inverting input nodes. Increasing the space between
signal lines and ground plane will minimize the coupling. Also,
signal lines connecting the feedback and gain resistors should be
kept short enough that their associated inductance does not
cause high frequency gain errors.
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