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| 型号： | AD8132ARM-EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 18/33页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD8132ARM |
| 标准包装： | 1 |
| 每 IC 通道数： | 1 - 单 |
| 放大器类型： | 差分 |
| 板类型： | 裸（未填充） |
| 已供物品： | 板 |
| 已用 IC / 零件： | 8-MSOP 封装 |
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AD8132
Rev. I | Page 24 of 32
When using the AD8132 in gain configurations where β1 ≠ β2,
differential output noise appears due to input-referred voltage
noise in the VOCM circuitry according to the following formula:
In cases where more accurate control of the output common-mode
level is required, it is a best practice that an external source or
resistor divider (with RSOURCE < 10 kΩ) be used. The output
common-mode offset values in the Specifications section assume
the VOCM input is driven by a low impedance voltage source.
+
=
β2
β1
β2
β1
V
NOCM
OND
2
DRIVING A CAPACITIVE LOAD
where:
VOND is the output differential noise.
VNOCM is the input-referred voltage noise on VOCM.
A purely capacitive load can react with the pin and bond wire
inductance of the AD8132, resulting in high frequency ringing
in the pulse response. One way to minimize this effect is to place a
small capacitor across each of the feedback resistors. The added
capacitance must be small to avoid destabilizing the amplifier. An
alternative technique is to place a small resistor in series with
the amplifier outputs, as shown in Figure 60.
CALCULATING INPUT IMPEDANCE OF THE
APPLICATION CIRCUIT
The effective input impedance of a circuit, such as that in Figure 64,
at +DIN and DIN, depends on whether the amplifier is being
driven by a single-ended or differential signal source. For balanced
differential input signals, the input impedance (RIN, dm) between
the inputs (+DIN and DIN) is simply
OPEN-LOOP GAIN AND PHASE
Open-loop gain and phase plots are shown in Figure 65 and
RIN, dm = 2 × RG
–20
–10
0
10
20
30
40
50
60
0.1
1
10
100
1000
FREQUENCY (MHz)
O
P
E
N
-L
OO
P
GA
IN
(d
B
)
RL, dm = 2k
01
035
-08
3
In the case of a single-ended input signal (for example, if DIN
is grounded and the input signal is applied to +DIN), the input
impedance becomes
()
+
×
=
F
G
F
G
dm
IN,
R
2
1
The circuit input impedance is effectively higher than it would
be for a conventional op amp connected as an inverter because
a fraction of the differential output voltage appears at the inputs
as a common-mode signal, partially bootstrapping the voltage
across the input resistor, RG.
Figure 65. Open-Loop Gain vs. Frequency
INPUT COMMON-MODE VOLTAGE RANGE IN
SINGLE-SUPPLY APPLICATIONS
–200
–180
–160
–140
–120
–100
–80
–60
–40
–20
0
20
40
0.1
1
10
100
1000
FREQUENCY (MHz)
O
P
E
N
-L
O
P
HAS
E
(
D
eg
rees)
RL, dm = 2k
01
03
5-
08
4
The AD8132 is optimized for level-shifting, ground-referenced
input signals. For a single-ended input, this implies that the voltage
voltage (at V) of the amplifier is also set to 0 V.
SETTING THE OUTPUT COMMON-MODE VOLTAGE
The VOCM pin of the AD8132 is internally biased at a voltage
approximately equal to the midsupply point (average value of the
voltage on V+ and V). Relying on this internal bias results in an
output common-mode voltage that is within approximately
100 mV of the expected value.
Figure 66. Open-Loop Phase vs. Frequency
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