参数资料
型号: AD8132ARM-EBZ
厂商: Analog Devices Inc
文件页数: 2/33页
文件大小: 0K
描述: BOARD EVAL FOR AD8132ARM
标准包装: 1
每 IC 通道数: 1 - 单
放大器类型: 差分
板类型: 裸(未填充)
已供物品:
已用 IC / 零件: 8-MSOP 封装
AD8132
Rev. I | Page 9 of 32
ABSOLUTE MAXIMUM RATINGS
Table 7.
Parameter
Rating
Supply Voltage
±5.5 V
VOCM
±VS
Internal Power Dissipation
250 mW
Operating Temperature Range
40°C to +125°C
Storage Temperature Range
65°C to +150°C
Lead Temperature (Soldering 10 sec)
300°C
Junction Temperature
150°C
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). The load current consists of the differential
and common-mode currents flowing to the load, as well as
currents flowing through the external feedback networks and
the internal common-mode feedback loop. The internal resistor
tap used in the common-mode feedback loop places a 1 kΩ
differential load on the output. Consider rms voltages and
currents when dealing with ac signals.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Airflow reduces θJA. In addition, more metal directly in contact
with the package leads from metal traces through holes, ground,
and power planes reduces the θJA.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 8-lead SOIC
JA = 121°C/W) and 8-lead MSOP (θJA = 142°C/W) packages
on a JEDEC standard 4-layer board. θJA values are approximations.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is
specified for the device soldered in a circuit board in still air.
AMBIENT TEMPERATURE (°C)
MA
X
IMU
M
P
O
W
E
R
D
ISS
IP
A
T
ION
(
W
)
1.75
1.50
1.00
1.25
0.50
0.25
0.75
0
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120
SOIC
MSOP
01
03
5-
0
82
Table 8.
Package Type
θJA
Unit
8-Lead SOIC, 4-Layer
121
°C/W
8-Lead MSOP, 4-Layer
142
°C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8132 packages
is limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, the glass transition temperature,
the plastic changes its properties. Even temporarily exceeding
this temperature limit can change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the AD8132. Exceeding a junction temperature of 150°C for
an extended period can result in changes in the silicon devices,
potentially causing failure.
Figure 3. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
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