参数资料
型号: AD8138ARMZ-REEL
厂商: Analog Devices Inc
文件页数: 10/25页
文件大小: 0K
描述: IC AMP DIFF LDIST LP 95MA 8MSOP
设计资源: DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7352 (CN0040)
DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7356 (CN0041)
DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7357 (CN0061)
标准包装: 3,000
类型: ADC 驱动器
应用: 数据采集
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-MSOP
包装: 带卷 (TR)
AD8138
Rev. F | Page 17 of 24
THEORY OF OPERATION
The AD8138 differs from conventional op amps in that it has
two outputs whose voltages move in opposite directions. Like
an op amp, it relies on high open-loop gain and negative
feedback to force these outputs to the desired voltages. The
AD8138 behaves much like a standard voltage feedback op
amp and makes it easy to perform single-ended-to-differential
conversion, common-mode level-shifting, and amplification of
differential signals. Also like an op amp, the AD8138 has high
input impedance and low output impedance.
Previous differential drivers, both discrete and integrated
designs, have been based on using two independent amplifiers
and two independent feedback loops, one to control each of the
outputs. When these circuits are driven from a single-ended
source, the resulting outputs are typically not well balanced.
Achieving a balanced output has typically required exceptional
matching of the amplifiers and feedback networks.
DC common-mode level-shifting has also been difficult with
previous differential drivers. Level-shifting has required the use
of a third amplifier and feedback loop to control the output
common-mode level. Sometimes the third amplifier has also
been used to attempt to correct an inherently unbalanced
circuit. Excellent performance over a wide frequency range
has proven difficult with this approach.
The AD8138 uses two feedback loops to separately control the
differential and common-mode output voltages. The differential
feedback, set with external resistors, controls only the differential
output voltage. The common-mode feedback controls only the
common-mode output voltage. This architecture makes it easy
to arbitrarily set the output common-mode level. It is forced, by
internal common-mode feedback, to be equal to the voltage
applied to the VOCM input, without affecting the differential
output voltage.
The AD8138 architecture results in outputs that are very highly
balanced over a wide frequency range without requiring tightly
matched external components. The common-mode feedback
loop forces the signal component of the output common-mode
voltage to be zeroed. The result is nearly perfectly balanced
differential outputs of identical amplitude and exactly
180° apart in phase.
ANALYZING AN APPLICATION CIRCUIT
The AD8138 uses high open-loop gain and negative feedback to
force its differential and common-mode output voltages in such
a way as to minimize the differential and common-mode error
voltages. The differential error voltage is defined as the voltage
between the differential inputs labeled +IN and IN in Figure 42.
For most purposes, this voltage can be assumed to be zero.
Similarly, the difference between the actual output common-
mode voltage and the voltage applied to VOCM can also be
assumed to be zero. Starting from these two assumptions, any
application circuit can be analyzed.
SETTING THE CLOSED-LOOP GAIN
Neglecting the capacitors CF, the differential-mode gain of the
circuit in Figure 42 can be determined to be described by
S
G
S
F
dm
OUT
dm
OUT
R
V
=
,
This assumes the input resistors,
RGS, and feedback resistors, RFS,
on each side are equal.
ESTIMATING THE OUTPUT NOISE VOLTAGE
Similar to the case of a conventional op amp, the differential
output errors (noise and offset voltages) can be estimated by
multiplying the input referred terms, at +IN and IN, by the
circuit noise gain. The noise gain is defined as
+
=
G
F
N
R
G
1
To compute the total output referred noise for the circuit of
Figure 42, consideration must also be given to the contribution
of the Resistors RF and RG. Refer to Table 8 for the estimated
output noise voltage densities at various closed-loop gains.
Table 8.
Gain
RG
(Ω)
RF
(Ω)
Bandwidth
3 dB
Output
Noise
AD8138
Only
Output
Noise
AD8138 +
RG, RF
1
499
320 MHz
10 nV/√Hz
11.6 nV/√Hz
2
499
1.0 k
180 MHz
15 nV/√Hz
18.2 nV/√Hz
5
499
2.49 k
70 MHz
30 nV/√Hz
37.9 nV/√Hz
10
499
4.99 k
30 MHz
55 nV/√Hz
70.8 nV/√Hz
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