参数资料
型号: AD8202_05
厂商: Analog Devices, Inc.
元件分类: 运动控制电子
英文描述: High Common-Mode Voltage, Single-Supply Difference Amplifier
中文描述: 高共模电压,单电源差分放大器
文件页数: 15/20页
文件大小: 248K
代理商: AD8202_05
AD8202
GAIN TRIM
Figure 45 shows a method for incremental gain trimming by
using a trim potentiometer and external resistor, R
EXT
.
Rev. D | Page 15 of 20
The following approximation is useful for small gain ranges:
ΔG ≈ (10 MΩ/
R
EXT
)%
Thus, the adjustment range is ±2% for R
EXT
= 5 MΩ; ±10% for
R
EXT
= 1 MΩ, and so on.
5V
OUT
R
EXT
GAIN TRIM
20k
Ω
MIN
V
CM
V
DIFF
2
V
DIFF
2
NC = NO CONNECT
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8202
0
Figure 45. Incremental Gain Trim
Internal Signal Overload Considerations
When configuring gain for values other than 20, the maxi-
mum input voltage with respect to the supply voltage and
ground must be considered because either the preamplifier
or the output buffer reaches its full-scale output (approximately
V
S
0.2 V) with large differential input voltages. The input of
the AD8202 is limited to (V
S
0.2)/10 for overall gains ≤ 10
because the preamplifier, with its fixed gain of ×10, reaches its full-
scale output before the output buffer. For gains greater than 10, the
swing at the buffer output reaches its full scale first and limits the
AD8202 input to (V
S
0.2)/G, where G is the overall gain.
LOW-PASS FILTERING
In many transducer applications, it is necessary to filter
the signal to remove spurious high frequency components
including noise, or to extract the mean value of a fluctuating
signal with a peak-to-average ratio (PAR) greater than unity.
For example, a full-wave rectified sinusoid has a PAR of 1.57,
a raised cosine has a PAR of 2, and a half-wave sinusoid has a
PAR of 3.14. Signals having large spikes can have PARs of 10
or more.
When implementing a filter, the PAR should be considered
so that the output of the AD8202 preamplifier (A1) does not
clip before A2 because this nonlinearity would be averaged
and appear as an error at the output. To avoid this error,
both amplifiers should clip at the same time. This condition
is achieved when the PAR is no greater than the gain of the
second amplifier (2 for the default configuration). For example,
if a PAR of 5 is expected, the gain of A2 should be increased to 5.
Low-pass filters can be implemented in several ways by using the
AD8202. In the simplest case, a single-pole filter (20 dB/decade)
is formed when the output of A1 is connected to the input of
A2 via the internal 100 kΩ resistor by tying Pin 3 and Pin 4
and adding a capacitor from this node to ground, as shown in
Figure 46. If a resistor is added across the capacitor to lower the
gain, the corner frequency increases; it should be calculated using
the parallel sum of the resistor and 100 kΩ.
5V
V
CM
V
DIFF
2
V
DIFF
2
NC = NO CONNECT
C
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8202
0
OUTPUT
f
C
=
1
2
π
C10
5
C IN FARADS
Figure 46. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor
If the gain is raised using a resistor, as shown in Figure 44, the
corner frequency is lowered by the same factor as the gain is
raised. Thus, using a resistor of 200 kΩ (for which the gain
would be doubled), the corner frequency is now 0.796 Hz/μF
(0.039 μF for a 20 Hz corner frequency).
5V
V
CM
V
DIFF
2
V
DIFF
2
NC = NO CONNECT
C
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8202
0
OUT
C
255k
Ω
f
C
(Hz) = 1/C(
μ
F)
Figure 47. 2-Pole, Low-Pass Filter
A 2-pole filter (with a roll-off of 40 dB/decade) can be
implemented using the connections shown in Figure 47. This is a
Sallen-Key form based on a ×2 amplifier. It is useful to remember
that a 2-pole filter with a corner frequency f
2
and a 1-pole filter
with a corner at f
1
have the same attenuation at the frequency
(f
22
/f
1
). The attenuation at that frequency is 40 log (f
2
/f
1
), which is
illustrated in Figure 48. Using the standard resistor value shown
and equal capacitors (see Figure 47), the corner frequency is
conveniently scaled at 1 Hz/μF (0.05 μF for a 20 Hz corner).
A maximally flat response occurs when the resistor is lowered to
196 kΩ and the scaling is then 1.145 Hz/μF. The output offset
is raised by approximately 5 mV (equivalent to 250 μV at the
input pins).
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