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| 型号： | IDT70V38L20PF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 5/17页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 1.125MBIT 20NS 100TQFP |
| 标准包装： | 6 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 双端口，异步 |
| 存储容量： | 1.125M（64K x 18） |
| 速度： | 20ns |
| 接口： | 并联 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 100-LQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 托盘 |
| 其它名称： | 70V38L20PF |
IDT70V38L
High-Speed 3.3V 64K x 18 Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (V CC = 3.3V ± 0.3V)
70V38L
Input Leakage Current
Symbol
|I LI |
|I LO |
V OL
V OH
Parameter
(1)
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Conditions
V CC = 3.6V, V IN = 0V to V CC
CE (2) = V IH , V OUT = 0V to V CC
I OL = +4mA
I OH = -4mA
Min.
___
___
___
2.4
Max.
5
5
0.4
___
Unit
μA
μA
V
V
NOTES:
1. At Vcc < 2.0V, input leakages are undefined.
2. Refer to Truth Table I - Chip Enable.
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (5) (V CC = 3.3V ± 0.3V)
70V38L15
Com'l Only
70V38L20
Com'l
& Ind
4850 tbl 09
Symbol
Parameter
Test Condition
Version
Typ. (1)
Max.
Typ. (1)
Max.
Unit
I CC
I SB1
Dynamic Operating
Current
(Both Ports Active)
Standby Current
(Both Ports - TTL Level
Inputs)
CE = V IL , Outputs Disabled
SEM = V IH
f = f MAX (2)
CE L = CE R = V IH
SEM R = SEM L = V IH
f = f MAX (2)
COM'L
IND
COM'L
IND
L
L
L
L
145
___
40
___
235
___
70
___
135
135
35
35
205
220
55
65
mA
mA
I SB2
Standby Current
CE "A" = V IL and CE "B" = V IH
(4)
COM'L
L
100
155
90
140
mA
(One Port - TTL Level
Inputs)
Active Port Outputs Disabled,
f=f MAX (2) , SEM R = SEM L = V IH
IND
L
___
___
90
150
I SB3
I SB4
Full Standby Current
(Both Ports - All CMOS
Level Inputs)
Full Standby Current
(One Port - All CMOS
Level Inputs)
Both Ports CE L and CE R > V CC - 0.2V,
V IN > V CC - 0.2V or V IN < 0.2V, f = 0 (3)
SEM R = SEM L > V CC - 0.2V
CE "A" < 0.2V and CE "B" > V CC - 0.2V (4) ,
SEM R = SEM L > V CC - 0.2V,
V IN > V CC - 0.2V or V IN < 0.2V,
Active Port Outputs Disabled , f = f MAX (2)
COM'L
IND
COM'L
IND
L
L
L
L
0.2
___
95
___
3.0
___
150
___
0.2
0.2
90
90
3.0
3.0
135
145
mA
mA
NOTES:
4850 tbl 10
1. V CC = 3.3V, T A = +25°C, and are not production tested. I CCDC = 90mA (Typ.)
2. At f = f MAX , address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/t RC, and using “AC Test Conditions" of input levels of GND
to 3V.
3. f = 0 means no address or control lines change.
4. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
5. Refer to Truth Table I - Chip Enable.
5
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