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参数资料
| 型号： | AD8309ARUZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/20页 |
| 文件大小： | 0K |
| 描述： | IC AMP LOG DEMODULATING 16TSSOP |
| 标准包装： | 1,000 |
| 类型： | 对数放大器 |
| 应用： | 接收器信号强度指示（RSSI） |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 带卷 (TR) |
REV. B
AD8309
–14–
load current, which may be large, the value of R2 should take
this into account.
The four pins labeled PADL tie down directly to the metallic
lead frame, and are thus connected to the back of the chip. The
process on which the AD8309 is fabricated uses a bonded-wafer
technique to provide a silicon-on-insulator isolation, and there is
no junction or other dc path from the back side to the circuitry
on the surface. These paddle pins must be connected directly to
the ground plane using the shortest possible lead lengths to
minimize inductance.
Basic Connections
Figure 30 shows the connections required for most applications.
The inputs are ac-coupled by C1 and C2, which normally
should have the same value, say, CO. The coupling time con-
stant is ROCO /2, where RO = RS + RIN, thus forming a high pass
corner with a 3 dB attenuation at fHP = 1/(
π R
T CC ). In high-
frequency applications, fHP should be chosen as large as pos-
sible, to minimize the coupling of unwanted signals. On the
other hand, in low frequency applications, a simple RC network
forming a low-pass filter should be added at the input for the
same reason.
1
2
3
4
5
6
7
8
VLOG
VPS2
PADL
LMHI
LMLO
PADL
FLTR
LMDR
COM2
VPS1
PADL
INHI
INLO
PADL
COM1
ENBL
AD8309
9
10
11
14
15
16
0.1 F
R2
10
RLOAD
NC
RLIM
RSSI
LMHI
LMLO
0.1 F
R1
10
ENABLE
RT
C1
C2
SEE TEXT FOR MORE
ABOUT DECOUPLING
SIGNAL
INPUTS
52.3
4.7nH
FOR BROADBAND 50
TERMINATION TO 1GHz
NC = NO CONNECT
12
13
VS
Figure 30. Basic Connections
Where it is necessary to terminate the source at a low imped-
ance, the resistor RT should be added, with allowance for the
shunting effect of the 1 k
input resistance (R
IN) of the AD8309.
For example, to terminate a 50
source, a 52.3 resistor
should be used for signal frequencies up to about 50 MHz. The
termination means may be placed either at the input or at the
log amp side of the coupling capacitors. In the former case
smaller capacitors can be used for a given frequency range; in
the latter case, the dc resistance is lowered directly at the log
amp inputs, which helps to keep offsets to a minimum. At
higher frequencies, the reactance of the 2.5 pF input capaci-
tance must be accounted for. A 4.7 nH inductor in series with
the 52.3
termination resistor provides an essentially flat 50
input impedance to 1 GHz. An impedance-transforming net-
work is preferably used to provide a 50
interface, since this
also introduces a balanced voltage gain of typically 13 dB and
the AD8309 has a very high capacity for large input voltages.
Figure 31 shows the output versus the input level, with the axis
marked in dBm (correct only when terminated in 50
), for sine
inputs at 5 MHz, 50 MHz, 100 MHz and 200 MHz. Figure 32
shows the typical logarithmic linearity (law conformance) under
the same conditions.
INPUT LEVEL – dBm Re 50
2.5
–100
RSSI
OUTPUT
–
V
2.0
1.5
1.0
0.5
0
–80
–60
–40
–20
0
20
40
100MHz
50MHz
200MHz
5MHz
Figure 31. RSSI Output vs. Input Level at TA = +25°C, for
Frequencies of 5 MHz, 50 MHz, 100 MHz and 200 MHz
INPUT LEVEL – dBm Re 50
5
–90
ERROR
–
dB
4
3
2
1
0
–1
–2
–3
–4
–5
–80 –70 –60 –50 –40 –30 –20 –10
0
10
20
30
DYNAMIC RANGE
5MHz
50MHz
100MHz
200MHz
3dB
93
99
103
102
1dB
85
91
97
96
50MHz
5MHz
200MHz
100MHz
Figure 32. Log Linearity vs. Input Level at TA = +25°C, for
Frequencies of 5 MHz, 50 MHz, 100 MHz and 200 MHz
Input Matching
Where either a higher sensitivity or a better high frequency
match is required, an input matching network is valuable. Using
a flux-coupled transformer to achieve the impedance transfor-
mation also eliminates the need for coupling capacitors, lowers
any dc offset voltages generated directly at the input, and use-
fully balances the drives to INHI and INLO, permitting full
utilization of the unusually large input voltage capacity of the
AD8309.
The choice of turns ratio will depend somewhat on the fre-
quency. At frequencies below 30 MHz, the reactance of the
input capacitance is much higher than the real part of the input
impedance. In this frequency range, a turns ratio of 2:9 will
lower the effective input impedance to 50
while raising the
input voltage by 13 dB. However, this does not lower the effect
of the short circuit noise voltage by the same factor, since there
will be a contribution from the input noise current. Thus, the
total noise will be reduced by a smaller factor. The intercept at
the primary input will be lowered to –120 dBV (–107 dBm).
Impedance matching and drive balancing using a flux-coupled
transformer is useful whenever broadband coupling is required.
However, this may not always be convenient. At high frequen-
cies, it will often be preferable to use a narrow-band matching
network, as shown in Figure 33, which has several advantages.
First, the same voltage gain can be achieved, providing increased
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