- 您现在的位置：买卖IC网 > PDF目录373943 > AD8318-EVAL (Analog Devices, Inc.) 1 MHz - 8 GHz, 60 dB Logarithmic Detector/Controller PDF资料下载
参数资料
| 型号： | AD8318-EVAL |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | 1 MHz - 8 GHz, 60 dB Logarithmic Detector/Controller |
| 中文描述： | 1兆赫- 8千兆赫，60分贝对数检测器/控制器 |
| 文件页数： | 12/24页 |
| 文件大小： | 2127K |
| 代理商： | AD8318-EVAL |
AD8318
USING THE AD8318
BASIC CONNECTIONS
The AD8318 is specified for operation up to 8 GHz, as a result
low impedance supply pins with adequate isolation between
functions are essential. In the AD8318, the two positive supply
pins, VPSI and VPSO, must be connected to the same potential.
The VPSI pin biases the input circuitry, while the VPSO biases
the low noise output driver for VOUT. Separate commons are
also included in the device. CMOP is used as the common for
the output drivers. All commons should be connected to a low
impedance ground plane.
Rev. 0 | Page 12 of 24
A power supply voltage of between 4.5 V and 5.5 V should be
applied to VPS0 and VPS1. 100 pF and 0.1 μF power supply
decoupling capacitors should be connected close to each power
supply pin. (The two adjacent VPS1 pins can share a pair of
decoupling capacitors because of their proximity.)
0
12
CMIP
11
CMIP
10
TADJ
9
VPSO
1
CMIP
2
CMIP
3
VPSI
4
VPSI
13
TEMP
8
CMOP
14
INHI
7
VSET
15
INLO
6
VOUT
16
ENBL
5
CLPF
AD8318
C7
100pF
C8
0.1
μ
F
V
S
C1
1nF
C2
1nF
499
(SEE TEXT)
C6
100pF
C5
0.1
μ
F
V
S
R1
52.3
TEMP
OUT
RF
INPUT
V
S
VOUT
Figure 22. Basic Connections
The paddle of the AD8318’s LFCSP package is internally
connected to CMIP.
For optimum thermal and electrical
performance, the paddle should be soldered to a low impedance
ground plane.
ENABLE
To enable the AD8318, the ENBL pin must be pulled high.
Taking ENBL low will put the AD8318 in sleep mode, reducing
current consumption to 260 μA at ambient. The voltage on
ENBL must be greater than 2 V
BE
(~1.7 V) to enable the device.
When enabled the devices draws less than 1 μA. When the ENBL
pin is pulled low, the pin sources 15 μA.
The enable interface has high input impedance. A 200
resistor
is placed in series with the ENBL input for added protection.
Figure 23 depicts a simplified schematic of the enable interface.
0
ENBL
CMIP
VPSI
2
×
V
BE
2
×
V
BE
DISCHARGE
ENABLE
40k
200
40k
Figure 23. ENBL Interface
INPUT SIGNAL COUPLING
The RF input to the AD8318 (INHI) is single-ended and
must be ac-coupled. INLO (input common) should be
ac-coupled to ground (See Figure 22). Suggested coupling
capacitors are 1 nF ceramic 0402 style capacitors for input
frequencies of 1 MHz to 8 GHz. The coupling capacitors
should be mounted close to the INHI and INLO pins. These
capacitor values can be increased to lower the input stage’s
high-pass cutoff frequency. The high-pass corner is set by
the input coupling capacitors and the internal 10 pF high-
pass capacitor. The dc voltage on INHI and INLO will be
about one diode voltage drop below V
PSI
.
The Smith chart in Figure 15 shows the AD8318’s input
impedance vs. frequency. Table 4 lists the reflection coeffi-
cient and impedance at select frequencies. For Figure 15 and
Table 4, the 52.3 input termination resistor was removed
.
At dc, the resistance is typically 2 k
. At frequencies up to 1
GHz, the impedance is approximated as 1000
|| 0.7 pF.
The RF input pins are coupled to a network given by the
simplified schematic in Figure 24.
0
VPSI
2k
A = 8.6dB
20k
20k
CURRENT
Gm
STAGE
INLO
INHI
OFFSET
COMP
10pF
10pF
FIRST
GAIN
STAGE
Figure 24. Input Interface
While the input can be reactively matched, in general this is
not necessary. An external 52.3
shunt resistor (connected
on the signal side of the input coupling capacitors, see
Figure 22) combines with the relatively high input imped-
ance to give an adequate broadband 50
match.
相关PDF资料 |
PDF描述 |
|---|---|
| AD8318 | 1 MHz - 8 GHz, 60 dB Logarithmic Detector/Controller |
| AD8318ACPZ-REEL7 | 1 MHz - 8 GHz, 60 dB Logarithmic Detector/Controller |
| AD8321AR-REEL | Gain Programmable CATV Line Driver |
| AD8321-EVAL | Gain Programmable CATV Line Driver |
| AD8321AR | Gain Programmable CATV Line Driver |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD8318-EVALZ | 功能描述:BOARD EVAL FOR AD8318 RoHS:是 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:- 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
| AD8318SCPZ-EP-R2 | 制造商:Analog Devices 功能描述:1 MHZ TO 8 GHZ, 70 DB LOGARITHMIC DETECTOR / CONTROLLER - Tape and Reel |
| AD8318SCPZ-EP-RL7 | 制造商:Analog Devices 功能描述: |
| AD8318SCPZ-EP-WP | 制造商:Analog Devices 功能描述:1 MHZ TO 8 GHZ, 70 DB LOGARITHMIC DETECTOR / CONTROLLER - Waffle Pack |
| AD8318XCPZ | 制造商:Analog Devices 功能描述:100MHZ - 8GHZ, 70DB LOGARITHMIC DETECTOR/CONTROLLER - Bulk |
发布紧急采购，3分钟左右您将得到回复。