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参数资料
| 型号： | AD8324JRQZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/16页 |
| 文件大小： | 0K |
| 描述： | IC LINE DRIVER CBL 3.3V 20QSOP |
| 标准包装： | 1 |
| 类型： | 线路驱动器，发射器 |
| 应用： | 调制解调器，CATV |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 20-QSOP |
| 包装： | 标准包装 |
| 其它名称： | AD8324JRQZ-REEL7DKR |
Data Sheet
AD8324
Rev. B | Page 15 of 16
DIFFERENTIAL SIGNAL SOURCE
Typical applications for the AD8324 use a differential input
signal from a modulator or a DAC. Refer to Table 8 for common
values of R4, or calculate other input configurations using the
equation in Figure 24. This circuit configuration gives optimal
distortion results due to the symmetric input signals. Note that
this configuration is used to characterize the AD8324.
Figure 24. Differential Circuit
DIFFERENTIAL SIGNAL FROM
SINGLE-ENDED SOURCE
To implement a differential signal from a single-ended signal
source, a 1:1 balun transformer is used to approximate the
differential signal as shown in Figure 25. Because of the non-
ideal nature of real transformers, the differential signal is not
purely equal and opposite in amplitude. Although this circuit
slightly sacrifices even order harmonic distortion due to asym-
metry, it does provide a convenient way to evaluate the AD8324
with a single-ended source.
Table 8 provides typical R4 values for common input configur-
ations. Other input impedances can be calculated using the
equation in Figure 25.
Figure 25. Single-to-Differential Circuit
SINGLE-ENDED SOURCE
Although the AD8324 is designed to have optimal DOCSIS
performance when used with a differential input signal, the
AD8324 can also be used as a single-ended receiver, or as an
IF digitally controlled amplifier. However, as with the single
ended to differential configuration noted previously, even-
order harmonic distortion is slightly degraded.
When operating the AD8324 in single-ended input mode, termin-
ate the part as illustrated in Figure 26. Table 8 shows the correct
values for R1 and R17 for some common input configurations.
Other input impedance configurations may be accommodated
using the equations in Figure 26.
Figure 26. Single-Ended Circuit
Table 8. Common Matching Resistors
Differential Input
Termination
Single-Ended Input
Termination
ZIN (Ω)
R4 (Ω)
ZIN (Ω)
R1/R17 (Ω)
50
52.3
50
54.9/26.1
75
80.6
75
86.6/40.2
100
110
150
174
AD8324
R4
R4 =
VIN+
VIN–
ZIN
ZIN 1100
1100
– Z
IN
04339-0-024
AD8324
R4
R4 =
VIN+
ZIN
ZIN 1100
1100
– Z
IN
04339-0-025
AD8324
R1
R17
VIN+
ZIN
R1 =
ZIN × 550
550 – ZIN
R17 =
ZIN × R1
R1 + ZIN
043
39-
0-
026
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