参数资料
型号: AD8341ACPZ-REEL72
厂商: Analog Devices, Inc.
元件分类: 调制器/解调器
英文描述: 1.5 GHz to 2.4 GHz RF Vector Modulator
中文描述: 1.5 GHz至2.4 GHz射频矢量调制器
文件页数: 3/20页
文件大小: 556K
代理商: AD8341ACPZ-REEL72
AD8341
SPECIFICATIONS
V
S
= 5 V, T
A
= 25°C, Z
O
= 50 , f = 1.9 GHz, single-ended, ac-coupled source drive to RFIP through 1.2 nH series inductor, RFIM
ac-coupled through 1.2 nH series inductor to common, differential-to-single-ended conversion at output using 1:1 balun.
Table 1.
Parameter
Conditions
OVERALL FUNCTION
Frequency Range
Maximum Gain
Maximum gain setpoint for all phase setpoints
Minimum Gain
V
BBI
= V
BBQ
= 0 V differential
(at recommended common-mode level)
Gain Control Range
Relative to maximum gain
Phase Control Range
Over 30 dB control range
Gain Flatness
Over any 60 MHz bandwidth
Group Delay Flatness
Over any 60 MHz bandwidth
RF INPUT STAGE
RFIM, RFIP (Pins 21 and 22)
Input Return Loss
From RFIP to CMRF (with 1.2 nH series inductors)
CARTESIAN CONTROL INTERFACE (I AND Q) IBBP, IBBM, QBBP, QBBM (Pins 16, 15, 3, 4)
Gain Scaling
Modulation Bandwidth
500 mV p-p, sinusoidal baseband input single-ended
Second Harmonic Distortion
500 mV p-p, 1 MHz, sinusoidal baseband input differential
Third Harmonic Distortion
500 mV p-p, 1 MHz, sinusoidal baseband input differential
Step Response
For gain setpoint from 0.1 to 0.9
(V
BBP
= 0.5 V, V
BBM
= 0.55 V to 0.95 V)
For gain setpoint from 0.9 to 0.1
(V
BBP
= 0.5 V, V
BBM
= 0.95 V to 0.55 V)
Recommended Common-Mode Level
RF OUTPUT STAGE
RFOP, RFOM (Pins 9, 10)
Output Return Loss
Measured through balun
f = 1.9 GHz
Gain
Maximum gain setpoint
Output Noise Floor
Maximum gain setpoint, no input
P
IN
= 0 dBm, frequency offset = 20 MHz
Output IP3
f1 = 1900 MHz, f2 = 1897.5 MHz, maximum gain setpoint
Adjacent Channel Power
CDMA2000, single carrier, P
OUT
= -4 dBm,
maximum gain, phase setpoint = 45° (See Figure 35)
Output 1 dB Compression Point
Maximum gain
POWER SUPPLY
VPS2 (Pins 5, 6, and 14), VPRF (Pins 19 and 24),
RFOP, RFOM (Pins 9 and 10)
Positive Supply Voltage
Total Supply Current
Includes load current
OUTPUT DISABLE
DSOP (Pin 13)
Disable Threshold
(See Figure 24)
Attenuation
DSOP = 5 V
Enable Response Time
Delay following high-to-low transition until
RF output amplitude is within 10% of final value.
Disable Response Time
Delay following low-to-high transition until
device produces full attenuation
Rev. 0 | Page 3 of 20
Min Typ
1.5
Max
2.4
Unit
GHz
dB
dB
4.5
34.5
30
360
0.5
50
12
2
230
41
47
45
dB
Degrees
dB
ps
dB
1/V
MHz
dBc
dBc
ns
45
ns
0.5
7.5
4.5
150.5
149
17.5
76
V
dB
dB
dBm/Hz
dBm/Hz
dBm
dBm
8.5
dBm
4.75 5
105
5.25
145
V
mA
V
dB
ns
125
V
s
/2
33
30
15
ns
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