参数资料
型号: AD8436JCPZ-WP
厂商: Analog Devices Inc
文件页数: 17/24页
文件大小: 0K
描述: IC CONV TRUE RMS-DC LP 20LFCSP
产品培训模块: Introduction to Analog RMS-to-DC Technology: Converters and Applications
标准包装: 64
电流 - 电源: 325µA
电源电压: ±2.4 V ~ 18 V,4.8 V ~ 36 V
安装类型: 表面贴装
封装/外壳: 20-WFQFN 裸露焊盘,CSP
供应商设备封装: 20-LFCSP-WQ(4x4)
包装: 托盘 - 晶粒

Data Sheet
AD8436 EVALUATION BOARD
The AD8436 -EVALZ provides a platform to evaluate AD8436
Table 6.
AD8436
performance. The board is fully assembled, tested, and ready to
use after the power and signal sources are connected. Figure 47
is a photograph of the board. Signal connections are located on the
primary and secondary sides, with power and ground on the inner
Switch
CORE_BUFFER
INCOUP
Function
Selects core or input buffer for the input
signal
Selects ac or dc coupling to the core
layers. Figure 42 to Figure 46 illustrate the various design details of
the board, including basic layout and copper patterns. These
figures are useful for reference for application designs.
A Word About Using the AD8436 Evaluation Board
The AD8436-EVALZ offers many options, without sacrificing
simplicity. The board is tested and shipped with a 10 μF averaging
capacitor (CAVG), 3.3 μF low-pass filter capacitor (C8) and a
0.1 μF (COPT) capacitor to optimize crest factor performance.
To evaluate minimum cost applications, remove C8 and COPT.
The functions of the five switches are listed in Table 6.
SDCOUT Selects the output buffer or the core
output at the DCOUT BNC.
IBUF_VCC Enable or disables the input buffer
OBUF_VCC Enable or disables the output buffer
All the I/Os are provided with test points for easy monitoring
with test equipment. The input buffer gain default is unity; for
2× gain, install a 0603 0 Ω resistor at Position R5. For higher
IBUF gains, remove the 0 Ω resistor at Position RFBH (there is
an internal 10 kΩ resistor from the OBUF_OUT to IBUFIN?)
and install a smaller value resistor in Position RFBL. A 100 Ω
resistor establishes a gain of 100×.
Single supply operation requires removal of Resistor R6 and
installing a 0.1 μF capacitor in the same position for noise
decoupling.
Rev. B | Page 17 of 24
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