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参数资料
| 型号： | AD872AJD |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | ADC |
| 英文描述： | Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| 中文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDIP28 |
| 封装： | SIDE BRAZED, CERAMIC, DIP-28 |
| 文件页数： | 15/20页 |
| 文件大小： | 330K |
| 代理商： | AD872AJD |
REV. A
–15–
AD872A
Figure 32 shows how a dc offset can be applied using the
AD568 12-bit, high speed digital-to-analog converter (DAC).
T his circuit can be used for applications requiring offset adjust-
ments on every clock cycle. T he AD568 connection scheme is
used to provide a –0.512 V to +0.512 V output range. T he off-
set voltage must be stable on the rising edge of the AD872A
clock input.
1
2
V
INA
V
INB
AD872A
IBPO
IOUT
RL
ACOM
LCOM
REF COM
AD568
74
HC
574
74
HC
574
8
8
4
4
DIGITAL
OFFSET
WORD
V
IN
Figure 32. Offset Correction Using the AD568
UNDE RSAMPLING USING T HE AD872A AND AD9100
T he AD872A’s on-chip T HA optimizes transient response while
maintaining low noise performance. For super-Nyquist (under-
sampling) applications it may be necessary to use an external
T HA with fast track-mode slew rate and hold mode settling
time. An excellent choice for this application is the AD9100, an
ultrahigh speed track-and-hold amplifier.
In order to maximize the spurious free dynamic range of the
circuit in Figure 33 it is advantageous to present a small signal
to the input of the AD9100 and then amplify the output to the
AD872A’s full-scale input range. T his can be accomplished with
a low distortion, wide bandwidth amplifier such as the AD9617.
T he circuit uses a gain of 3.5 to optimize S/(N+D).
For small scale input signals (–20 dB, –40 dB), the AD872A
performs better without the track-and-hold because slew-
limiting effects are no longer dominant. T o gain the advantages
of the added track-and-hold, it is important to give the AD872A
a full-scale input.
An alternative to the configuration presented above is to use the
AD9101 track-and-hold amplifier. T he AD9101 provides a
built-in post amplifier with a gain of 4, providing excellent ac
characteristics in conjunction with a high level of integration.
As illustrated in Figure 33, it is necessary to skew the AD872A
sample clock and the AD9100 sample/hold control. Clock skew
(t
S
) is defined as the time starting at the AD9100’s transition
into hold mode and ending at the moment the AD872A samples.
T he AD872A samples on the rising edge of the sample clock,
and the AD9100 samples on the falling edge of the sample/hold
control. T he choice of t
S
is primarily determined by the settling
time of the AD9100. T he droop rate of the AD9100 must also
be taken into consideration. Using these values, the ideal t
S
is
17 ns. When choosing clock sources, it is extremely important
that the front end track-and-hold sample/hold control is given a
very low jitter clock source. T his is not as crucial for the
AD872A sample clock, because it is sampling a dc signal.
Figure 33. Undersampling Using the AD872A and AD9100
AD9100
2
3
8
10
17
13
12
11
6
15
1
5
7
14
16
20
4
19
18
AD872A
EB
CLOCK 1
IN
+V
S
–V
S
1
5
7
Q
9
10
48
Q
R
T
510
510
–V
S
–V
S
R
T
+V
S
10
m
F
10
m
F
–V
S
127
7
2
3
4
5*
6
8*
0.1
m
F
3.3
m
F
–5V
442
0.1
m
F
0.1
m
F
0.1
m
F
3.3
m
F
+5V
CLOCK 2
* OPTIONAL, SEE
AD9617 DATASHEET
+V
S
= 5.0V
–V
S
= –5.2V
ALL CAPACITORS ARE 0.01
m
F
(LOW INDUCTANCE - DECOUPLING)
UNLESS OTHERWISE NOTED.
T = 200ns
CLOCK 2
CLOCK 1
t
S
= 17ns
t
S
T = 200ns
+5V
0V
+1V
–1V
9AD
AD
V
IN
A
IN
IN
相关PDF资料 |
PDF描述 |
|---|---|
| AD872AJE | Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872ASD | Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872ASE | Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872 | Complete 12-Bit 10MSPS Monolithic A/D Converter(12位10MSPS单片A/D转换器) |
| AD8801 | Octal 8-Bit TrimDAC with Power Shutdown(带电源关断的八路8位微调D/A转换器) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD872AJE | 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk |
| AD872ASD | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872ASD/883B | 制造商:Analog Devices 功能描述:ADC Single Pipelined 10Msps 12-bit Parallel 28-Pin CDIP 制造商:Analog Devices 功能描述:ADC SGL PIPELINED 10MSPS 12-BIT PARALLEL 28CDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk 制造商:Analog Devices 功能描述:CONVERTER - ADC |
| AD872ASE | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872ASE/883B | 制造商:Analog Devices 功能描述:ADC Single Pipelined 10Msps 12-bit Parallel 44-Pin LCC 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk |
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