REV. A
–12–
AD872A
REF IN
REF GND
AD872A
+5V REF
2k
V
3.9k
V
R
R
T
2.5V
5k
V
Figure 21. Optional +5 V Reference Input Circuit
RE FE RE NCE GROUND
T he REF GND pin provides the reference point for both the
reference input, and the reference output. When the internal
reference is operating, it will draw approximately 500
μ
A of cur-
rent through the reference ground, so a low impedance path to
the external common is desirable. T he AD872A can tolerate a
fairly large difference between REF GND and AGND, up to
+1 V, without any performance degradation.
RE FE RE NCE OUT PUT
T he AD872A features an onboard, curvature compensated
bandgap reference that has been laser trimmed for both absolute
value and temperature drift. T he output stage of the reference
was designed to allow the use of an external capacitor to limit
the wideband noise. As Figure 22 illustrates,
a 1
μ
F capacitor on
the reference output is required for stability of the reference output
buffer.
Note: If used, an external reference may become unstable
with this capacitor in place.
REF IN
REF GND
AD872A
0.1
m
F
REF OUT
+
1.0
m
F
Figure 22. Typical Reference Decoupling Connection
With this capacitor in place, the noise on the reference output is
approximately 28
μ
V rms at room temperature. Figure 23 shows
the typical temperature drift performance of the reference, while
Figure 24 illustrates the variation in reference voltage with load
currents.
T he output stage is designed to provide at least 2 mA of out-
put current, allowing a single reference to drive up to four
AD872As, or other external loads. T he power supply rejection
of the reference is better than –54 dB at dc.
2.55
2.45
125
2.48
2.46
–35
2.47
–55
2.51
2.49
2.50
2.52
2.53
2.54
105
85
65
45
25
5
–15
TEMPERATURE –
8
C
R
Figure 23. Reference Output Voltage vs. Temperature
2.50
2.40
1M
2.46
2.42
10k
2.44
1k
2.48
100k
REFERENCE OUTPUT LOAD –
V
R
Figure 24. Reference Output Voltage vs. Output Load
DIGIT AL OUT PUT S
In 28-lead packages, the AD872A output data is presented in
twos complement format. T able III indicates offset binary and
twos complement output for various analog inputs.
T able III. Output Data Format
Analog Input
Digital Output
V
INA
–V
INB
Offset Binary
T wos Complement OT R
≥
0.999756 V
0.999268 V
0 V
–1 V
–1.000244 V
1111 1111 1111
1111 1111 1111
1000 0000 0000
0000 0000 0000
0000 0000 0000
0111 1111 1111
0111 1111 1111
0000 0000 0000
1000 0000 0000
1000 0000 0000
1
0
0
0
1
Users requiring offset binary encoding may simply invert the
MSB
pin. In the 44-terminal surface mount packages, both
MSB and
MSB
bits are provided.
T he AD872A features a digital out-of-range (OT R) bit that goes
high when the input exceeds positive full scale or falls below
negative full scale. As T able III indicates, the output bits will be
set appropriately according to whether it is an out-of-range high