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参数资料
| 型号： | AD872ASD |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | ADC |
| 英文描述： | Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| 中文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDIP28 |
| 封装： | SIDE BRAZED, CERAMIC, DIP-28 |
| 文件页数： | 6/20页 |
| 文件大小： | 330K |
| 代理商： | AD872ASD |
REV. A
–6–
AD872A
DE FINIT IONS OF SPE CIFICAT IONS
LINE ARIT Y E RROR (INL)
Linearity error refers to the deviation of each individual code
from a line drawn from “negative full scale” through “positive
full scale.” T he point used as “negative full scale” occurs
1/2 LSB before the first code transition. “Positive full scale” is
defined as a level 1 1/2 LSB beyond the last code transition.
T he deviation is measured from the middle of each particular
code to the true straight line.
DIFFE RE NT IAL LINE ARIT Y E RROR (DNL, NO MISSING
CODE S)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Guaranteed
no missing codes to 12-bit resolution indicates that all 4096
codes must be present over all operating ranges.
ZE RO E RROR
T he major carry transition should occur for an analog value
1/2 LSB below analog common. Zero error is defined as the
deviation of the actual transition from that point. T he zero error
and temperature drift specify the initial deviation and maximum
change in the zero error over temperature.
GAIN E RROR
T he first code transition should occur for an analog value
1/2 LSB above nominal negative full scale. T he last transition
should occur for an analog value 1 1/2 LSB below the nominal
positive full scale. Gain error is the deviation of the actual differ-
ence between first and last code transitions and the ideal differ-
ence between first and last code transitions.
T E MPE RAT URE DRIFT
T he temperature drift for zero error and gain error specifies the
maximum change from the initial (+25
°
C) value to the value at
T
MIN
or T
MAX
.
POWE R SUPPLY RE JE CT ION
T he specifications show the maximum change in the converter’s
full scale as the supplies are varied from nominal to min/max
values.
APE RT URE JIT T E R
Aperture jitter is the variation in aperture delay for successive
samples and is manifested as noise on the input to the A/D.
APE RT URE DE LAY
Aperture delay is a measure of the T rack-and-Hold Amplifier
(T HA) performance and is measured from the rising edge of the
clock input to when the input signal is held for conversion.
OVE RVOLT AGE RE COVE RY T IME
Overvoltage recovery time is defined as that amount of time re-
quired for the ADC to achieve a specified accuracy after an
overvoltage (50% greater than full-scale range), measured from
the time the overvoltage signal reenters the converter’s range.
DY NAMIC SPE CIFICAT IONS
SIGNAL-T O-NOISE AND DIST ORT ION (S/N+D) RAT IO
S/N+D is the ratio of the rms value of the measured input signal
to the rms sum of all other spectral components below the
Nyquist frequency, including harmonics but excluding dc. T he
value for S/N+D is expressed in decibels.
T OT AL HARMONIC DIST ORT ION (T HD)
T HD is the ratio of the rms sum of the first six harmonic com-
ponents to the rms value of the measured input signal and is ex-
pressed as a percentage or in decibels.
INT E RMODULAT ION DIST ORT ION (IMD)
With inputs consisting of sine waves at two frequencies, fa and
fb, any device with nonlinearities will create distortion products,
of order (m + n), at sum and difference frequencies of mfa
±
nfb, where m, n = 0, 1, 2, 3 . . . . Intermodulation terms are
those for which m or n is not equal to zero. For example, the
second order terms are (fa + fb) and (fa – fb), and the third or-
der terms are (2 fa + fb), (2 fa – fb), (fa + 2 fb) and (2 fb – fa).
T he IMD products are expressed as the decibel ratio of the rms
sum of the measured input signals to the rms sum of the distor-
tion terms. T he two signals are of equal amplitude and the peak
value of their sums is –0.5 dB from full scale. T he IMD prod-
ucts are normalized to a 0 dB input signal.
FULL-POWE R BANDWIDT H
T he full-power bandwidth is that input frequency at which the
amplitude of the reconstructed fundamental is reduced by 3 dB
for a full-scale input.
SPURIOUS FRE E DY NAMIC RANGE
T he difference, in dB, between the rms amplitude of the input
signal and the peak spurious signal.
ORDE RING GUIDE
Model
T emperature Range
Package Option
1
AD872AJD
AD872AJE
AD872ASD
2
AD872ASE
2
0
°
C to +70
°
C
0
°
C to +70
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
D-28
E-44A
D-28
E-44A
NOT ES
1
D = Ceramic DIP, E = Leadless Ceramic Chip Carrier.
2
MIL-ST D-883 version will be available; contact factory.
相关PDF资料 |
PDF描述 |
|---|---|
| AD872ASE | Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872 | Complete 12-Bit 10MSPS Monolithic A/D Converter(12位10MSPS单片A/D转换器) |
| AD8801 | Octal 8-Bit TrimDAC with Power Shutdown(带电源关断的八路8位微调D/A转换器) |
| AD8803 | Octal 8-Bit TrimDAC with Power Shutdown(带电源关断八路8位微调D/A转换器) |
| AD8803AR | Octal 8-Bit TrimDAC with Power Shutdown |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD872ASD/883B | 制造商:Analog Devices 功能描述:ADC Single Pipelined 10Msps 12-bit Parallel 28-Pin CDIP 制造商:Analog Devices 功能描述:ADC SGL PIPELINED 10MSPS 12-BIT PARALLEL 28CDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk 制造商:Analog Devices 功能描述:CONVERTER - ADC |
| AD872ASE | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872ASE/883B | 制造商:Analog Devices 功能描述:ADC Single Pipelined 10Msps 12-bit Parallel 44-Pin LCC 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk |
| AD872JD | 制造商:Analog Devices 功能描述: |
| AD872JE | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 12-Bit |
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