参数资料
型号: AD9204-80EBZ
厂商: Analog Devices Inc
文件页数: 1/36页
文件大小: 0K
描述: BOARD EVALUATION 80MSPS AD9204
设计资源: AD9650,92xx Schematic
AD92xx/AD9650 Gerber Files
标准包装: 1
ADC 的数量: 2
位数: 10
采样率(每秒): 80M
数据接口: 串行,SPI?
输入范围: 1 ~ 2 Vpp
在以下条件下的电源(标准): 177mW @ 80MSPS
工作温度: -40°C ~ 85°C
已用 IC / 零件: AD9204
已供物品:
10-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS,
1.8 V Dual Analog-to-Digital Converter
AD9204
Rev. 0
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responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2009 Analog Devices, Inc. All rights reserved.
FEATURES
1.8 V analog supply operation
1.8 V to 3.3 V output supply
SNR
61.3 dBFS at 9.7 MHz input
61.0 dBFS at 200 MHz input
SFDR
75 dBc at 9.7 MHz input
73 dBc at 200 MHz input
Low power
30 mW per channel at 20 MSPS
63 mW per channel at 80 MSPS
Differential input with 700 MHz bandwidth
On-chip voltage reference and sample-and-hold circuit
DNL = ±0.11 LSB
Serial port control options
Scalable analog input: 1 V p-p to 2 V p-p differential
Offset binary, gray code, or twos complement data format
Optional clock duty cycle stabilizer
Integer 1-to-8 input clock divider
Built-in selectable digital test pattern generation
Energy-saving power-down modes
Data clock out with programmable clock and data
alignment
APPLICATIONS
Communications
Diversity radio systems
Multimode digital receivers
GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
I/Q demodulation systems
Smart antenna systems
Battery-powered instruments
Handheld scope meters
Ultrasound
Radar/LIDAR
PET/SPECT imaging
FUNCTIONAL BLOCK DIAGRAM
VIN+A
VIN–A
VREF
SENSE
VCM
RBIAS
VIN–B
VIN+B
ORA
D0A
D9A
DCOA
DRVDD
ORB
D9B
D0B
DCOB
SDIO
GND
AVDD
SCLK
SPI
PROGRAMMING DATA
PDWN DFS
CLK+ CLK–
MODE
CONTROLS
DCS
DUTY CYCLE
STABILIZER
SYNC
DIVIDE
1TO 8
OEB
CSB
REF
SELECT
ADC
CM
O
S
O
U
TP
U
T
B
U
FFE
R
ADC
CM
O
S
O
UT
P
UT
BUF
F
E
R
AD9204
08122-
001
M
U
X
OP
TIO
N
Figure 1.
PRODUCT HIGHLIGHTS
1.
The AD9204 operates from a single 1.8 V analog power
supply and features a separate digital output driver supply
to accommodate 1.8 V to 3.3 V logic families.
2.
The patented sample-and-hold circuit maintains excellent
performance for input frequencies up to 200 MHz and is
designed for low cost, low power, and ease of use.
3.
A standard serial port interface supports various product
features and functions, such as data output formatting,
internal clock divider, power-down, DCO/DATA timing
and offset adjustments, and voltage reference modes.
4.
The AD9204 is packaged in a 64-lead RoHS compliant
LFCSP that is pin compatible with the AD9268 16-bit
ADC, the AD9251 and AD9258 14-bit ADCs, and the
AD9231 12-bit ADC, enabling a simple migration path
between 10-bit and 16-bit converters sampling from
20 MSPS to 125 MSPS.
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