参数资料
型号: AD9218BSTZ-RL65
厂商: Analog Devices Inc
文件页数: 25/28页
文件大小: 0K
描述: IC ADC 10BIT DUAL 65MSPS 48-LQFP
标准包装: 1
位数: 10
采样率(每秒): 65M
数据接口: 并联
转换器数目: 2
功率耗散(最大): 390mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 标准包装
输入数目和类型: 2 个差分,单极
其它名称: AD9218BSTZRL65DKR
AD9218
Rev. C | Page 6 of 28
SWITCHING SPECIFICATIONS
VDD = 3.0 V, V = 3.0 V; external reference, unless otherwise noted.
D
Table 4.
Test
AD9218BST-40/-65
AD9218BST-80/-105
Parameter
Temp
Level
Min
Typ
Max
Min
Typ
Max
Unit
ENCODE INPUT PARAMETERS
Maximum Encode Rate
Full
VI
40/65
80/105
MSPS
Minimum Encode Rate
Full
IV
20/20
MSPS
Encode Pulse Width High (tEH)
Full
IV
7/6
5/3.8
ns
Encode Pulse Width Low (tEL)
Full
IV
7/6
5/3.8
ns
Aperture Delay (tA)
25°C
V
2
ns
Aperture Uncertainty (Jitter)
25°C
V
3
ps rms
DIGITAL OUTPUT PARAMETERS
Output Valid Time (tV)
Full
VI
2.5
ns
Output Propagation Delay (tPD)1
Full
VI
4.5
7
4.5
6
ns
Output Rise Time (tR)
25°C
V
1
1.0
ns
Output Fall Time (tF)
25°C
V
1.2
ns
Out-of-Range Recovery Time
25°C
V
5
ns
Transient Response Time
25°C
V
5
ns
Recovery Time from Power-Down
25°C
V
10
Cycles
Pipeline Delay
Full
IV
5
Cycles
1 t and t
V
PD
are measured from the 1.5 level of the ENCODE input to the 50%/50% levels of the digital outputs swing. The digital output load during test is not to exceed
an ac load of 5 pF or a dc current of ±40 μA. Rise and fall times are measured from 10% to 90%.
TIMING DIAGRAMS
02
00
1-
0
02
1/fS
tA
tEH
tEL
tPD
tV
SAMPLE N
ENCODE A
ENCODE B
D9A TO D0A
D9B TO D0B
AINA
AINB
DATA N – 5
DATA N – 4
DATA N – 3
DATA N – 2
DATA N – 1
DATA N
DATA N – 5
DATA N – 4
DATA N – 3
DATA N – 2
DATA N – 1
DATA N
SAMPLE
N + 1
SAMPLE
N + 5
SAMPLE
N + 6
SAMPLE
N + 2
SAMPLE
N + 3
SAMPLE
N + 4
Figure 2. Normal Operation, Same Clock (S1 = 1, S2 = 0) Channel Timing
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