参数资料
型号: AD9267EBZ
厂商: Analog Devices Inc
文件页数: 16/24页
文件大小: 0K
描述: BOARD EVALUATION FOR AD9267
标准包装: 1
ADC 的数量: 2
位数: 16
采样率(每秒): 640M
数据接口: 串行,SPI?
输入范围: 2 ~ 3 Vpp
在以下条件下的电源(标准): 416mW @ 640MSPS
工作温度: -40°C ~ 85°C
已用 IC / 零件: AD9267
已供物品:
AD9267
Rev. 0 | Page 23 of 24
MEMORY MAP
Table 16. Memory Map
Register
Address (Hex)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPI Port Config
00
0
LSBFIRST
SOFTRESET
1
SOFTRESET
LSBFIRST
0
Chip ID
01
CHIPID[7:0]
Chip Grade
02
CHILDID[1:0]
Channel Index
05
Channel[1:0]
Power Modes
08
PWRDWN[1:0]
PLLENABLE
09
PLLENABLE
PLL
0A
PLLLOCKED
PLLAUTO
PLLMULT[5:0]
Output Modes
14
DRVSTD
OUTENB
Output Adjust
15
LVDSTERM[1:0]
Output Clock
16
DCOINV
Reference
18
EXTREF
Overrange
111
AUTORST
OR_IND1
OR_IND2
MEMORY MAP DEFINITIONS
Table 17. Memory Map Definitions
Register
Address
Bit Name
Bit(s)
Default
Description
SPI Port Config
0x00
LSBFIRST
[6], [1]
0
0: serial interface uses MSB-first format
1: serial interface uses LSB-first format
SOFTRESET
[5], [2]
0
1: default all serial registers except 0x00, 0x09, and 0x0A
Chip ID
0x01
CHIPID
[7:0]
0x22
0x22: AD9267
Chip Grade
0x02
CHILDID
5:4]
0
0x00: 10 MHz bandwidth
0x10: 5 MHz bandwidth
0x20: 2.5 MHz bandwidth
0x30: modulator only
Channel Index
0x05
Channel
[1:0]
0
0x1: Channel A only addressed
0x2: Channel B only addressed
0x3: both channels addressed simultaneously
Power Modes
0x08
PWRDWN
[1:0]
0
0x0: normal operation
0x1: channel power-down (local)
0x2: standby (everything except reference circuits)
0x3: sleep
PLLENABLE
0x09
PLLENABLE
[2]
0
1: enable PLL
PLL
0x0A
PLLLOCKED
[7]
0
0: PLL is not locked
1: PLL is locked
PLLAUTO
[6]
0
0: disable PLL auto band select
1: enable PLL auto band select
PLLMULT
[5:0]
0
Output Modes
0x14
DRVSTD
[7]
0
0: ANSI-644
1: Low power (IEEE1596.3 similar)
OUTENB
[4]
0
1: Channel A and Channel B outputs tristated
Output Adjust
0x15
LVDSTERM
[5:4]
0
0: no termination
1: 200 Ω
2: 100 Ω
3: 100 Ω
Output Clock
0x16
DCOINV
[7]
0
1: invert DCO±
Reference
0x18
EXTREF
[6]
0
1: use external reference
Overrange
0x111
AUTORST
[7]
0
1: enable autoreset
OR_IND1
[6]
0
OR_IND2
[5]
0
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