参数资料
型号: AD9289BBC
厂商: Analog Devices Inc
文件页数: 11/32页
文件大小: 0K
描述: IC ADC 8BIT QUAD 65MSPS 64CSPBGA
标准包装: 1
位数: 8
采样率(每秒): 65M
数据接口: 串行
转换器数目: 4
功率耗散(最大): 625mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LFBGA,CSPBGA
供应商设备封装: 64-CSPBGA(8x8)
包装: 托盘
输入数目和类型: 8 个单端,单极;4 个差分,单极
AD9289
Rev. 0 | Page 19 of 32
External Reference Operation
The use of an external reference may be necessary to enhance
the gain accuracy of the ADC or improve thermal drift
characteristics. Figure 36 shows the typical drift characteristics
of the internal shared reference in both 1 V and 0.5 V modes.
TEMPERATURE (
°C)
V
RE
F
E
RROR
(%)
0.15
0.10
0
0.05
–0.05
–0.10
–0.15
–0.20
–0.25
–40
0
–20
60
40
20
80
03682-034
VREF = 0.5V
VREF = 1.0V
Figure 36. Typical VREF Drift
When the SENSE pin is tied to AVDD, the internal reference is
disabled, allowing the use of an external reference. An internal
reference buffer loads the external reference with an equivalent
7 k load. The internal buffer still generates the positive and
negative full-scale references, REFT_A and REFT_B and
REFB_A and REFB_B , for the ADC core. The input span is
always twice the value of the reference voltage; therefore, the
external reference must be limited to a maximum of 1 V.
Power and Ground Recommendations
When connecting power to the AD9289, it is recommended that
two separate 3.0 V supplies be used. One for analog (AVDD)
and one for digital (DRVDD). If only one supply is available
then it should be routed to the AVDD first and tapped off and
isolated with a ferrite bead or filter choke with decoupling
capacitors proceeding. One may want to use several different
decoupling capacitors to cover both high and low frequencies.
These should be located close the point of entry at the pc board
level as well as close to the parts with minimal trace length.
A single pc board ground plane should be sufficient when using
the AD9289. With proper decoupling and smart partitioning of
the pc board’s analog, digital, and clock sections, optimum
performance is easily achieved.
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