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参数资料
型号： AD9518-0A/PCBZ
厂商： Analog Devices Inc
文件页数： 12/64页
文件大小： 0K
描述： BOARD EVALUATION FOR AD9518-0A
设计资源： AD9518 Eval Brd Schematics
AD9518 Gerber Files
AD9518-0 BOM
标准包装： 1
主要目的： 计时，时钟发生器
嵌入式： 否
已用 IC / 零件： AD9518-0A
主要属性： 2 输入，6 输出，2.8GHz VCO
次要属性： LVPECL 输出逻辑
已供物品： 板
AD9518-0
Data Sheet
Rev. C | Page 2 of 64
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
Power Supply Requirements ....................................................... 4
PLL Characteristics ...................................................................... 4
Clock Inputs .................................................................................. 6
Clock Outputs............................................................................... 6
Timing Characteristics ................................................................ 6
Clock Output Additive Phase Noise (Distribution Only;
VCO Divider Not Used).............................................................. 7
Clock Output Absolute Phase Noise (Internal VCO Used).... 7
Clock Output Absolute Time Jitter (Clock Generation
Using Internal VCO).................................................................... 8
Clock Output Absolute Time Jitter (Clock Cleanup Using
Internal VCO)............................................................................... 8
Clock Output Absolute Time Jitter (Clock Generation
Using External VCXO) ................................................................ 8
Clock Output Additive Time Jitter (VCO Divider
Not Used)....................................................................................... 9
Clock Output Additive Time Jitter (VCO Divider Used) ....... 9
Serial Control Port ..................................................................... 10
PD, SYNC, and RESET Pins ..................................................... 10
LD, STATUS, and REFMON Pins............................................ 11
Power Dissipation....................................................................... 11
Timing Diagrams............................................................................ 12
Absolute Maximum Ratings.......................................................... 13
Thermal Resistance.................................................................... 13
ESD Caution................................................................................ 13
Pin Configuration and Function Descriptions........................... 14
Typical Performance Characteristics ........................................... 16
Terminology.................................................................................... 20
Detailed Block Diagram ................................................................ 21
Theory of Operation ...................................................................... 22
Operational Configurations...................................................... 22
Digital Lock Detect (DLD) ....................................................... 30
Clock Distribution ..................................................................... 34
Reset Modes ................................................................................ 38
Power-Down Modes .................................................................. 38
Serial Control Port ......................................................................... 40
Serial Control Port Pin Descriptions....................................... 40
General Operation of Serial Control Port............................... 40
The Instruction Word (16 Bits)................................................ 41
MSB/LSB First Transfers ........................................................... 41
Thermal Performance.................................................................... 44
Control Registers............................................................................ 45
Control Register Map Overview .............................................. 45
Control Register Map Descriptions ......................................... 47
Applications Information .............................................................. 59
Frequency Planning Using the AD9518.................................. 59
Using the AD9518 Outputs for ADC Clock Applications.... 59
LVPECL Clock Distribution..................................................... 60
Outline Dimensions....................................................................... 61
Ordering Guide .......................................................................... 61
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