- 您现在的位置：买卖IC网 > PDF目录1987 > AD9558BCPZ-REEL7 (Analog Devices Inc)IC CLK XLATR PLL 1250MHZ 64LFCSP PDF资料下载
参数资料
| 型号： | AD9558BCPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/104页 |
| 文件大小： | 0K |
| 描述： | IC CLK XLATR PLL 1250MHZ 64LFCSP |
| 产品变化通告： | AD9558 Minor Metal Mask Change 17/Apr/2012 |
| 标准包装： | 750 |
| 类型： | 时钟/频率转换器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH，Stratum |
| 输入： | CMOS，LVDS，LVPECL |
| 输出： | CMOS，HSTL，LVDS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 4:6 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 1.25GHz |
| 电源电压： | 1.71 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 带卷 (TR) |
第1页第2页当前第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页
AD9558
Data Sheet
Rev. B | Page 100 of 104
Table 121. EEPROM Storage Sequence for REFA Profile Settings
Address
Bits
Bit Name
Description
0x0E2A
[7:0]
REFA Profile
The default value of this register is 0x26, which the controller interprets as a data instruction. Its decimal
value is 38, so this tells the controller to transfer 39 bytes of data (38 + 1), beginning at the address that
is specified by the next two bytes. The controller stores 0x26 in the EEPROM and increments the EEPROM
address pointer.
0x0E2B
[7:0]
The default value of these two registers is 0x0700. Note that Register 0x0E2B and Register 0x0E2C are
the most significant and least significant bytes of the target address, respectively. Because the previous
register contains a data instruction, these two registers define a starting address (in this case, 0x0700).
The controller stores 0x0700 in the EEPROM and increments the EEPROM pointer by 2. It then transfers
39 bytes from the register map (beginning at Address 0x0700) to the EEPROM and increments the
EEPROM address pointer by 40 (39 data bytes and one checksum byte). The 39 bytes transferred
correspond to the REFA profile parameters in the register map.
0x0E2C
[7:0]
Table 122. EEPROM Storage Sequence for REFB Profile Settings
Address
Bits
Bit Name
Description
0x0E2D
[7:0]
REFB profile
The default value of this register is 0x26, which the controller interprets as a data instruction. Its decimal
value is 38, so this tells the controller to transfer 39 bytes of data (38 + 1), beginning at the address that is
specified by the next two bytes. The controller stores 0x26 in the EEPROM and increments the EEPROM
address pointer.
0x0E2E
[7:0]
The default value of these two registers is 0x0740. Note that Register 0x0E2E and Register 0x0E2F are the
most significant and least significant bytes of the target address, respectively. Because the previous register
contains a data instruction, these two registers define a starting address (in this case, 0x0740). The controller
stores 0x0740 in the EEPROM and increments the EEPROM pointer by 2. It then transfers 39 bytes from the
register map (beginning at Address 0x0740) to the EEPROM and increments the EEPROM address pointer
by 40 (39 data bytes and one checksum byte). The 39 bytes transferred correspond to the REFB profile
parameters in the register map.
0x0E2F
[7:0]
Table 123. EEPROM Storage Sequence for REFC Profile Settings
Address
Bits
Bit Name
Description
0x0E30
[7:0]
REFC profile
The default value of this register is 0x26, which the controller interprets as a data instruction. Its decimal
value is 38, so this tells the controller to transfer 39 bytes of data (38 + 1), beginning at the address that is
specified by the next two bytes. The controller stores 0x26 in the EEPROM and increments the EEPROM
address pointer.
0x0E31
[7:0]
The default value of these two registers is 0x0780. Note that Register 0x0E31 and Register 0x0E32 are
the most significant and least significant bytes of the target address, respectively. Because the previous
register contains a data instruction, these two registers define a starting address (in this case, 0x0780).
The controller stores 0x0780 in the EEPROM and increments the EEPROM pointer by 2. It then transfers
39 bytes from the register map (beginning at Address 0x0780) to the EEPROM and increments the
EEPROM address pointer by 40 (39 data bytes and one checksum byte). The 39 bytes transferred
correspond to the REFC profile parameters in the register map.
0x0E32
[7:0]
Table 124. EEPROM Storage Sequence for REFD Profile Settings
Address
Bits
Bit Name
Description
0x0E33
[7:0]
REFD profile
The default value of this register is 0x26, which the controller interprets as a data instruction. Its decimal
value is 38, so this tells the controller to transfer 39 bytes of data (38 + 1), beginning at the address that is
specified by the next two bytes. The controller stores 0x26 in the EEPROM and increments the EEPROM
address pointer.
0x0E34
[7:0]
The default value of these two registers is 0x07C0. Note that Register 0x0E34 and Register 0x0E35 are
the most significant and least significant bytes of the target address, respectively. Because the previous
register contains a data instruction, these two registers define a starting address (in this case, 0x07C0).
The controller stores 0x07C0 in the EEPROM and increments the EEPROM pointer by 2. It then transfers
39 bytes from the register map (beginning at Address 0x07C0) to the EEPROM and increments the EEPROM
address pointer by 40 (39 data bytes and one checksum byte). The 39 bytes transferred correspond to
the REFD profile parameters in the register map.
0x0E35
[7:0]
相关PDF资料 |
PDF描述 |
|---|---|
| AD9571ACPZPEC-R7 | IC PLL CLOCK GEN 25MHZ 40LFCSP |
| AD9572ACPZLVD-R7 | IC PLL CLOCK GEN 25MHZ 40LFCSP |
| AD9573ARUZ-RL7 | IC PCI CLCOK GEN 25MHZ 16TSSOP |
| AD9575ARUZPEC | IC PLL CLOCK GEN 25MHZ 16TSSOP |
| AD9577BCPZ-R7 | IC CLOCK GENERATOR 40LFCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9559 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator |
| AD9559/PCBZ | 功能描述:时钟和定时器开发工具 Multi-protocol line card dual clock RoHS:否 制造商:Texas Instruments 产品:Evaluation Modules 类型:Clock Conditioners 工具用于评估:LMK04100B 频率:122.8 MHz 工作电源电压:3.3 V |
| AD9559BCPZ | 功能描述:时钟发生器及支持产品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| AD9559BCPZ-REEL7 | 功能描述:时钟发生器及支持产品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| AD9559PCBZ | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator |
发布紧急采购，3分钟左右您将得到回复。