参数资料
| 型号： | AD974ANZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | IC DAS 16BIT 4CH 200KSPS 28DIP |
| 标准包装： | 13 |
| 类型： | 数据采集系统（DAS） |
| 分辨率（位）： | 16 b |
| 采样率（每秒）： | 200k |
| 数据接口： | 串行 |
| 电压电源： | 模拟和数字 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 28-DIP（0.600"，15.24mm） |
| 供应商设备封装： | 28-PDIP |
| 包装： | 管件 |
| 配用： | EVAL-AD974CB-ND - BOARD EVAL FOR AD974 |
REV. A
AD974
–5–
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Description
1
AGND1
Analog Ground. Used as the ground reference point for the REF pin.
2–5, 25–28
VxA, VxB
Analog Input. Refer to Table I for input range configuration.
6
BIP
Bipolar Offset. Connect VxA inputs to provide Bipolar input range.
7
CAP
Reference Buffer Output. Connect a 2.2
F tantalum capacitor between CAP and Analog
Ground.
8
REF
Reference Input/Output. The internal +2.5 V reference is available at this pin. Alternatively an
external reference can be used to override the internal reference. In either case, connect a 2.2
F
tantalum capacitor between REF and Analog Ground.
9
AGND2
Analog Ground.
10
R/
C
Read/
Convert Input. Used to control the conversion and read modes. With CS LOW, a falling
edge on R/
C holds the analog input signal internally and starts a conversion; a rising edge enables
the transmission of the conversion result.
11
VDIG
Digital Power Supply. Nominally +5 V.
12
PWRD
Power-Down Input. When set to a logic HIGH, power consumption is reduced and conversions
are inhibited. The conversion result from the previous conversion is stored in the onboard shift
register.
13
EXT/
INT
Digital select input for choosing the internal or an external data clock. With EXT/
INT tied LOW,
after initiating a conversion, 16 DATACLK pulses transmit the previous conversion result as
shown in Figure 3. With EXT/
INT set to a Logic HIGH, output data is synchronized to an
external clock signal connected to the DATACLK input. Data is output as indicated in Figure 4
through Figure 9.
14
DGND
Digital Ground.
15
SYNC
Digital output frame synchronization for use with an external data clock (EXT/
INT = Logic
HIGH). When a read sequence is initiated, a pulse one DATACLK period wide is output
synchronous to the external data clock.
16
DATACLK
Serial data clock input or output, dependent upon the logic state of the EXT/
INT pin. When
using the internal data clock (EXT/
INT = Logic LOW), a conversion start sequence will initiate
transmission of 16 DATACLK periods. Output data is synchronous to this clock and is valid on
both its rising and falling edges (Figure 3). When using an external data clock (EXT/
INT = Logic
HIGH), the
CS and R/C signals control how conversion data is accessed.
17
DATA
The serial data output is synchronized to DATACLK. Conversion results are stored in an on-
chip register. The AD974 provides the conversion result, MSB first, from its internal shift regis-
ter. When using the internal data clock (EXT/
INT = Logic LOW), DATA is valid on both the
rising and falling edges of DATACLK. Using an external data clock (EXT/
INT = Logic HIGH)
allows previous conversion data to be accessed during a conversion (Figures 5, 7 and 9) or the
conversion result can be accessed after the completion of a conversion (Figures 4, 6 and 8).
18, 19
WR1, WR2
Multiplexer Write Inputs. These inputs are internally ORed to generate the mux latch inputs.
The latch is transparent when
WR1 and WR2 are tied low.
20
CS
Chip Select Input. With R/
C LOW, a falling edge on CS will initiate a conversion. With R/C
HIGH, a falling edge on
CS will enable the serial data output sequence.
21
BUSY
Busy Output. Goes LOW when a conversion is started, and remains LOW until the conversion is
completed and the data is latched into the on-chip shift register.
22, 23
A1, A0
Address multiplexer inputs latched with the
WR1, WR2 inputs.
A1
A0
Data Available from Channel
00AIN 1
01AIN 2
10AIN 3
11AIN 4
24
VANA
Analog Power Supply. Nominally +5 V.
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| AD974AR | 功能描述:IC DAS 16BIT 4CH 200KSPS 28-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
| AD974ARS | 制造商:Analog Devices 功能描述:ADC Single 200ksps 16-bit Serial 28-Pin SSOP 制造商:Rochester Electronics LLC 功能描述:4-CHANNEL 16 BIT 200KSPS DATA ACQ SYSTEM - Bulk |
| AD974ARSZ | 功能描述:IC DAS 16BIT 4CH 200KSPS 28-SSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Data Converter Basics 标准包装:1 系列:- 类型:电机控制 分辨率（位）:12 b 采样率（每秒）:1M 数据接口:串行，并联 电压电源:单电源 电源电压:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:100-TQFP 供应商设备封装:100-TQFP（14x14） 包装:剪切带 (CT) 其它名称:296-18373-1 |
| AD974ARZ | 功能描述:IC DAS 16BIT 4CH 200KSPS 28-SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Data Converter Basics 标准包装:1 系列:- 类型:电机控制 分辨率（位）:12 b 采样率（每秒）:1M 数据接口:串行，并联 电压电源:单电源 电源电压:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:100-TQFP 供应商设备封装:100-TQFP（14x14） 包装:剪切带 (CT) 其它名称:296-18373-1 |
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