参数资料
型号: AD9753ASTZ
厂商: Analog Devices Inc
文件页数: 26/28页
文件大小: 0K
描述: IC DAC 12BIT 300MSPS 48-LQFP
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 1
系列: TxDAC+®
设置时间: 11ns
位数: 12
数据接口: 并联
转换器数目: 1
电压电源: 模拟和数字
功率耗散(最大): 165mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 托盘
输出数目和类型: 2 电流,单极;2 电流,双极
采样率(每秒): 300M
配用: AD9753-EB-ND - BOARD EVAL FOR AD9753
REV. B
AD9753
–7–
TERMINOLOGY
Linearity Error (Also Called Integral Nonlinearity or INL)
Linearity error is defined as the maximum deviation of the actual
analog output from the ideal output, determined by a straight
line drawn from zero to full scale.
Differential Nonlinearity (DNL)
DNL is the measure of the variation in analog value, normalized
to full scale, associated with a 1 LSB change in digital input code.
Monotonicity
A D/A converter is monotonic if the output either increases or
remains constant as the digital input increases.
Offset Error
The deviation of the output current from the ideal of zero is
called offset error. For IOUTA, 0 mA output is expected when the
inputs are all 0s. For IOUTB, 0 mA output is expected when all
inputs are set to 1s.
Gain Error
The difference between the actual and ideal output span. The
actual span is determined by the output when all inputs are set
to 1s, minus the output when all inputs are set to 0s.
Output Compliance Range
The range of allowable voltage at the output of a current-output
DAC. Operation beyond the maximum compliance limits may
cause either output stage saturation or breakdown, resulting in
nonlinear performance.
Temperature Drift
Specified as the maximum change from the ambient (25
°C)
value to the value at either TMIN or TMAX. For offset and gain
drift, the drift is reported in ppm of full-scale range (FSR) per
degree Celsius. For reference drift, the drift is reported in ppm
per degree Celsius.
Power Supply Rejection
The maximum change in the full-scale output as the supplies
are varied from minimum to maximum specified voltages.
Settling Time
The time required for the output to reach and remain within a
specified error band about its final value, measured from the
start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in pV-s.
Spurious-Free Dynamic Range
The difference, in dB, between the rms amplitude of the output
signal and the peak spurious signal over the specified bandwidth.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic com-
ponents to the rms value of the measured fundamental. It is
expressed as a percentage or in decibels (dB).
Signal-to-Noise Ratio (SNR)
SNR is the ratio of the rms value of the measured output signal
to the rms sum of all other spectral components below the Nyquist
frequency, excluding the first six harmonics and dc. The value
for SNR is expressed in decibels.
Adjacent Channel Power Ratio (ACPR)
A ratio in dBc between the measured power within a channel
relative to its adjacent channel.
AD9753
IOUTA
IOUTB
SEGMENTED
SWITCHES FOR
DB0 TO DB11
DAC
FSADJ
REFIO
1.2V REF
CLK+
PLLLOCK
DIGITAL DATA INPUTS
0.1 F
RSET
2k
1k
50
MINI
CIRCUITS
T1-1T
TO ROHDE &
SCHWARZ
FSEA30
SPECTRUM
ANALYZER
DB0 – DB11
TEKTRONIX DG2020
OR
AWG2021 w/OPTION 4
LECROY 9210
PULSE GENERATOR
(FOR DATA RETIMING)
DCOM
PMOS CURRENT
SOURCE ARRAY
AVDD
3.0V TO 3.6V
DVDD
2–1 MUX
PORT 1 LATCH
DAC LATCH
ACOM
PORT 2 LATCH
CLK–
PLL
CIRCUITRY
PLLVDD
CLKVDD
RESET
LPF
CLKCOM
DIV0
DIV1
50
DB0 – DB11
MINI
CIRCUITS
T1-1T
1k
3.0V TO 3.6V
HP8644
SIGNAL
GENERATOR
PLL ENABLED
PLL DISABLED
Figure 2. Basic AC Characterization Test Setup
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