参数资料
型号: AD9764ARZ
厂商: Analog Devices Inc
文件页数: 21/22页
文件大小: 0K
描述: IC DAC 14BIT 125MSPS 28-SOIC
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 27
系列: TxDAC®
设置时间: 35ns
位数: 14
转换器数目: 1
电压电源: 模拟和数字
功率耗散(最大): 170mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC
包装: 管件
输出数目和类型: 2 电流,单极;2 电流,双极
采样率(每秒): 125M
产品目录页面: 785 (CN2011-ZH PDF)
REV. B
AD9764
–8–
dBc
–70
–75
–95
000.0E+0
40.0E+6
80.0E+6
120.0E+6
–80
–85
–90
2ND HARMONIC
3RD HARMONIC
4TH HARMONIC
Figure 12. THD vs. fCLOCK @
fOUT = 2 MHz
CODE
ERROR
LSB
2.0
–2.0
0
16000
4000
8000
12000
1.5
0.0
–0.5
–1.0
–1.5
1.0
0.5
Figure 15. Typical INL
000.0E+0
7.5E+6
15.0E+6
22.5E+6
10dB
Div
0
–10
–90
–50
–60
–70
–80
–20
–40
–30
fCLK = 50MSPS
fOUT = 1.25MHz
SFDR = 78dBc
AMPLITUDE = 0dBFS
Figure 18. Single-Tone SFDR
fCLOCK – MSPS
SNR
dB
85
80
60
0
10
100
20
30
40 50
60
70 80 90
75
70
65
IOUTFS = 5mA,
DVDD = +5V
IOUTFS = 5mA,
DVDD = +3V
IOUTFS = 10mA,
DVDD = +5V
IOUTFS = 10mA,
DVDD = +3V
IOUTFS = 20mA,
DVDD = +5V
IOUTFS = 20mA,
DVDD = +3V
Figure 13. SNR vs. fCLOCK @ fOUT =
2.0 MHz
CODE
ERROR
LSB
2.0
–1.0
0
16000
4000
8000
12000
1.5
1.0
0.5
0.0
–0.5
Figure 16. Typical DNL
0E+0
25E+6
5E+6
10E+6
15E+6
20E+6
10dB
Div
0
–10
–90
–50
–60
–70
–80
–20
–40
–30
fCLK = 50MSPS
fOUT1 = 6.75MHz
fOUT2 = 7.25MHz
SFDR = 69dBc
AMPLITUDE = 0dBFS
Figure 19. Dual-Tone SFDR
OUTPUT FREQUENCY – MHz
SFDR
dBc
80
70
50
1
10
100
60
IDIFF @ 0dBFS
IDIFF @ –6dBFS
IA @ 0dBFS
IA @ –6dBFS
Figure 14. Differential vs. Single-
Ended SFDR vs. fOUT @ 50 MSPS
TEMPERATURE – C
SFDR
dBc
80
75
50
–40
–20
80
60
70
65
60
55
40
20
0
2.5MHz
10MHz
40MHz
Figure 17. SFDR vs. Temperature
@ 100 MSPS, 0 dBFS
10dB
Div
0
–70
–100
–10
–60
–80
–90
–40
–50
–20
–30
000.0E+0
7.5E+6
15.0E+6
22.5E+6
fCLK = 50MSPS
fOUT1 = 6.25MHz
fOUT2 = 6.75MHz
fOUT3 = 7.25MHz
fOUT4 = 7.75MHz
SFDR = 66dBc
AMPLITUDE = 0dBFS
Figure 20. Four-Tone SFDR
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