参数资料
型号: AD9814JRRL
厂商: Analog Devices Inc
文件页数: 3/15页
文件大小: 0K
描述: IC CCD SIGNAL PROC 14BIT 28-SOIC
标准包装: 1,000
类型: CCD 信号处理器,14 位
输入类型: 逻辑
输出类型: 逻辑
接口: 3 线串口
电流 - 电源: 80mA
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 带卷 (TR)
REV. 0
AD9814
–11–
PGA Gain Registers
There are three PGA registers for individually programming the gain in the red, green and blue channels. Bits D8, D7 and D6 in
each register must be set low, and bits D5 through D0 control the gain range in 64 increments. See Figure 13 for a graph of the PGA
Gain versus PGA register code. The coding for the PGA registers is straight binary, with an all “zeros” word corresponding to the
minimum gain setting (1x) and an all “ones” word corresponding to the maximum gain setting (5.8x).
Table IV. PGA Gain Register Settings
D8
D7
D6
D5
D4
D3
D2
D1
D0
Gain (V/V)
Gain (dB)
Set to 0
MSB
LSB
0
0*
1.0
0.0
0
1
1.013
0.12
0
1
0
5.4
14.6
0
1
5.8
15.25
*Power-on default value.
Offset Registers
There are three PGA registers for individually programming the offset in the red, green and blue channels. Bits D8 through D0 con-
trol the offset range from –300 mV to +300 mV in 512 increments. The coding for the offset registers is sign magnitude, with D8 as
the sign bit. Table V shows the offset range as a function of the Bits D8 through D0.
Table V. Offset Register Settings
D8
D7
D6
D5
D4
D3
D2
D1
D0
Offset (mV)
MSB
LSB
000000000*
0
000000001+1.2
011111111
+300
1000000000
100000001
–1.2
111111111
–300
*Power-on default value.
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