参数资料
型号: AD9834BRUZ-REEL
厂商: Analog Devices Inc
文件页数: 15/32页
文件大小: 0K
描述: IC DDS 10BIT 50MHZ LP 20TSSOP
产品培训模块: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
设计资源: Amplitude Control Circuit for AD9834 Waveform Generator (CN0156)
标准包装: 2,500
分辨率(位): 10 b
主 fclk: 50MHz
调节字宽(位): 28 b
电源电压: 2.3 V ~ 5.5 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
AD9834
Data Sheet
Table 16. Applying the SLEEP Function
SLEEP
Pin
SLEEP1
Bit
SLEEP12
Bit
PIN/SW
Bit
Result
0
X
1
No power-down
1
X
1
DAC powered
down
X
0
No power-down
X
0
1
0
DAC powered
down
X
1
0
Internal clock
disabled
X
1
0
Both the DAC
powered down
and the internal
clock disabled
DAC Powered Down
This is useful when the AD9834 is used to output the MSB of
the DAC data only. In this case, the DAC is not required and
can be powered down to reduce power consumption.
Internal Clock Disabled
When the internal clock of the AD9834 is disabled, the DAC
output remains at its present value because the NCO is no
longer accumulating. New frequency, phase, and control words
can be written to the part when the SLEEP1 control bit is active.
The synchronizing clock remains active, meaning that the
selected frequency and phase registers can also be changed
either at the pins or by using the control bits. Setting the
SLEEP1 bit to 0 enables the MCLK. Any changes made to the
registers when SLEEP1 is active are observed at the output after
a certain latency.
The effect of asserting the SLEEP pin is evident immediately at
the output, that is, the zero-to-one transition of this pin is not
sampled. However, the negative transition of SLEEP is sampled
on the internal falling edge of MCLK.
SIGN BIT OUT PIN
The AD9834 offers a variety of outputs from the chip. The
digital outputs are available from the SIGN BIT OUT pin. The
available outputs are the comparator output or the MSB of the
DAC data. The bits controlling the SIGN BIT OUT pin are
outlined in Table 17.
This pin must be enabled before use. The enabling/disabling of
this pin is controlled by the Bit OPBITEN (DB5) in the control
register. When OPBITEN = 1, this pin is enabled. Note that the
MODE bit (DB1) in the control register should be set to 0 if
OPBITEN = 1.
Comparator Output
The AD9834 has an on-board comparator. To connect this
comparator to the SIGN BIT OUT pin, the SIGN/PIB (DB4)
control bit must be set to 1. After filtering the sinusoidal output
from the DAC, the waveform can be applied to the comparator
to generate a square waveform.
MSB from the NCO
The MSB from the NCO can be output from the AD9834. By
setting the SIGN/PIB (DB4) control bit to 0, the MSB of the
DAC data is available at the SIGN BIT OUT pin. This is useful
as a coarse clock source. This square wave can also be divided
by two before being output. Bit DIV2 (DB3) in the control register
controls the frequency of this output from the SIGN BIT OUT pin.
Table 17. Various Outputs from SIGN BIT OUT
OPBITEN
Bit
MODE
Bit
SIGN/PIB
Bit
DIV2
Bit
SIGN BIT OUT Pin
0
X
High impedance
1
0
DAC data MSB/2
1
0
1
DAC data MSB
1
0
1
0
Reserved
1
0
1
Comparator output
1
X
Reserved
THE IOUT AND IOUTB PINS
The analog outputs from the AD9834 are available from the
IOUT and IOUTB pins. The available outputs are a sinusoidal
output or a triangle output.
Sinusoidal Output
The SIN ROM converts the phase information from the
frequency and phase registers into amplitude information,
resulting in a sinusoidal signal at the output. To have a
sinusoidal output from the IOUT and IOUTB pins, set
Bit MODE (DB1) to 0.
Triangle Output
The SIN ROM can be bypassed so that the truncated digital
output from the NCO is sent to the DAC. In this case, the
output is no longer sinusoidal. The DAC produces 10-bit linear
triangular function. To have a triangle output from the IOUT
and IOUTB pins, set Bit MODE (DB1) to 1.
Note that the SLEEP pin and SLEEP12 bit must be 0 (that is, the
DAC is enabled) when using the IOUT and IOUTB pins.
Table 18. Various Outputs from IOUT and IOUTB
OPBITEN Bit
MODE Bit
IOUT and IOUTB Pins
0
Sinusoid
0
1
Triangle
1
0
Sinusoid
1
Reserved
3π/2
7π/2
11π/2
VOUT MAX
VOUT MIN
02705-
027
Figure 30. Triangle Output
Rev. D | Page 22 of 32
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