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| 型号： | AD9850BRSZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 2/20页 |
| 文件大小： | 0K |
| 描述： | IC DDS SYNTHESIZER CMOS 28-SSOP |
| 产品培训模块： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 标准包装： | 1,500 |
| 分辨率（位）： | 10 b |
| 主 fclk： | 125MHz |
| 调节字宽（位）： | 32 b |
| 电源电压： | 3.3V，5V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 28-SSOP |
| 包装： | 带卷 (TR) |
AD9850
–10–
REV. H
tDS
W0*
W1
W2
W3
W4
tDH
tWH
tWL
tCF
VALID DATA
OLD FREQ (PHASE)
NEW FREQ (PHASE)
*OUTPUT UPDATE CAN OCCUR AFTER ANY WORD LOAD
AND IS ASYNCHRONOUS WITH THE REFERENCE CLOCK
DATA
W CLK
CLKIN
COS OUT
tDS
DATA SETUP TIME
3.5ns
tDH
DATA HOLD TIME
3.5ns
tWH
W CLK HIGH
3.5ns
tWL
W CLK LOW
3.5ns
tCD
CLK DELAY AFTER FQ_UD
3.5ns
tFH
FQ UD HIGH
7.0ns
tFL
FQ UD LOW
7.0ns
tFD
FQ UD DELAY AFTER W CLK
7.0ns
tCF
OUTPUT LATENCY FROM FQ UD
FREQUENCY CHANGE
18 CLOCK CYCLES
PHASE CHANGE
13 CLOCK CYCLES
SYMBOL
DEFINITION
MINIMUM
tCD
tFD
tFH
tFL
FQ UD
Figure 6. Parallel Load Frequency/Phase Update Timing Sequence
Table III. 8-Bit Parallel Load Data/Control Word Functional Assignment
Word
Data[7]
Data[6]
Data[5]
Data[4]
Data[3]
Data[2]
Data[1]
Data[0]
W0
Phase-b4
Phase-b3
Phase-b2
Phase-b1
Phase-b0
Power-Down
Control
(MSB)
(LSB)
W1
Freq-b31
Freq-b30
Freq-b29
Freq-b28
Freq-b27
Freq-b26
Freq-b25
Freq-b24
(MSB)
W2
Freq-b23
Freq-b22
Freq-b21
Freq-b20
Freq-b19
Freq-b18
Freq-b17
Freq-b16
W3
Freq-b15
Freq-b14
Freq-b13
Freq-b12
Freq-b11
Freq-b10
Freq-b9
Freq-b8
W4
Freq-b7
Freq-b6
Freq-b5
Freq-b4
Freq-b3
Freq-b2
Freq-b1
Freq-b0
(LSB)
Table II. Factory Reserved Internal Test Control Codes
Loading Format
Factory Reserved Codes
Parallel
1) W0 = XXXXXX10
2) W0 = XXXXXX01
Serial
1) W32 = 1; W33 = 0
2) W32 = 0; W33 = 1
3) W32 = 1; W33 = 1
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| AD9851BRS | 功能描述:IC DDS DAC W/COMP 180MHZ 28-SSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 直接数字合成 (DDS) 系列:- 产品变化通告:Product Discontinuance 27/Oct/2011 标准包装:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 调节字宽（位）:32 b 电源电压:2.97 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| AD9851BRSRL | 功能描述:IC DDS/DAC SYNTHESIZER 28-SSOP RoHS:否 类别:集成电路 (IC) >> 接口 - 直接数字合成 (DDS) 系列:- 产品变化通告:Product Discontinuance 27/Oct/2011 标准包装:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 调节字宽（位）:32 b 电源电压:2.97 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
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