参数资料
| 型号： | AD9858BSVZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/32页 |
| 文件大小： | 0K |
| 描述： | IC DDS DAC 10BIT 1GSPS 100-TQFP |
| 产品培训模块： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 设计资源： | Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109) |
| 标准包装： | 1 |
| 分辨率（位）： | 10 b |
| 主 fclk： | 1GHz |
| 调节字宽（位）： | 32 b |
| 电源电压： | 3.14 V ~ 3.47 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TQFP 裸露焊盘 |
| 供应商设备封装： | 100-TQFP-EP（14x14） |
| 包装： | 托盘 |
| 产品目录页面： | 552 (CN2011-ZH PDF) |
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AD9858
Rev. C | Page 26 of 32
Profile Selection
A profile consists of a specific group of memory registers (see
Table 6). In the AD9858, each profile contains a 32-bit frequency
tuning word and a 14-bit phase offset word. Each profile is
selectable via two external profile select pins (PS0 and PS1), as
defined in Table 12. The specific mapping of registers to profiles is
detailed in the Register Bit Descriptions section. The user should
be aware that selection of a profile is internally synchronized
with DDS CLK using the SYNCLK timing. That is, SYNCLK is
used to synchronize the assertion of the profile select pins (PS0
and PS1). Therefore, the PS0 and PS1 pins must be set up and
held around the rising edge of SYNCLK.
Table 12.
PS1
PS0
Profile
0
1
0
2
1
3
The profiles are available to the user to provide rapid changing
of device parameters via external hardware, which alleviates the
speed limitations imposed by the I/O port. For example, the user
might preprogram the four phase offset registers with values that
correspond to phase increments of 90°. By controlling the PS0 and
PS1 pins, the user can implement π/2 phase modulation. The data
modulation rate is much higher than that possible by repeatedly
reloading a single phase offset register via the I/O port.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9858FDPCB | 制造商:AD 制造商全称:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858TLPCB | 制造商:AD 制造商全称:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858XSV | 制造商:Analog Devices 功能描述: |
| AD9859 | 制造商:AD 制造商全称:Analog Devices 功能描述:400 MSPS, 10-Bit, 1.8 V CMOS Direct Digital Synthesizer |
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