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参数资料
| 型号： | AD9884AKSZ-140 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/24页 |
| 文件大小： | 0K |
| 描述： | IC ANLG INTERFC 140MSPS 128-MQFP |
| 标准包装： | 1 |
| 显示器类型： | LCD |
| 接口： | 模拟 |
| 电流 - 电源： | 135mA |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-BFQFP |
| 供应商设备封装： | 128-MQFP（14x20） |
| 包装： | 托盘 |
| 产品目录页面： | 788 (CN2011-ZH PDF) |
AD9884A
PIN FUNCTION DESCRIPTIONS (continued)
Pin Name
Function
ANALOG INTERFACE
REFOUT
REFIN
FILT
Internal Reference Output
Output from the internal 1.25 V bandgap reference. This output is intended to drive relatively light loads. It can
drive the AD9884A Reference input directly, but should be externally buffered if it is used to drive other loads as
well. The absolute accuracy of this output is ± 4%, and the temperature coefficient is ± 50 ppm, which is adequate
for most AD9884A applications. If higher accuracy is required, an external reference may be employed. If an exter-
nal reference is used, tie this pin to ground through a 0.1 μ F capacitor.
Reference Input
The reference input accepts the master reference voltage for all AD9884A internal circuitry (+1.25 V ± 10%). It
may be driven directly by the REFOUT pin. Its high impedance presents a very light load to the reference source.
This pin should be bypassed to Ground with a 0.1 μ F capacitor.
External Filter Connection
For proper operation, the pixel clock generator PLL requires an external filter. Connect the filter shown in Figure
10 to this pin. For optimal performance, minimize noise and parasitics on this node.
POWER SUPPLY
V D
V DD
PV D
GND
Main Power Supply
These pins supply power to the main elements of the circuit. It should be as quiet and filtered as possible.
Digital Output Power Supply
A large number of output pins (up to 52) switching at high speed (up to 140 MHz) generates a lot of power supply
transients (noise). These supply pins are identified separately from the V D pins so special care can be taken to
minimize output noise transferred into the sensitive analog circuitry. If the AD9884A is interfacing with lower-
voltage logic, V DD may be connected to a lower supply voltage (as low as 2.5 V) for compatibility.
Clock Generator Power Supply
The most sensitive portion of the AD9884A is the clock generation circuitry. These pins provide power to the
clock PLL and help the user design for optimal performance. The designer should provide “quiet,” noise-free
power to these pins.
Ground
The ground return for all circuitry on chip. It is recommended that the AD9884A be assembled on a single solid
ground plane, with careful attention to ground current paths. See the Design Guide for details.
–8 –
REV. C
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9884AKSZ-140 | 制造商:Analog Devices 功能描述:IC GRAPHICS DIGITIZER |
| AD9884KS-100 | 制造商:Rochester Electronics LLC 功能描述:100 MSPS GRAPHICS DIGITIZ - Bulk |
| AD9884KS-140 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9886 | 制造商:AD 制造商全称:Analog Devices 功能描述:Analog Interface for Flat Panel Displays |
| AD9886/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Analog Interface for Flat Panel Displays |
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