参数资料
型号: AD9958BCPZ
厂商: Analog Devices Inc
文件页数: 17/44页
文件大小: 0K
描述: IC DDS DUAL 500MSPS DAC 56LFCSP
产品培训模块: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
设计资源: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
Phase Coherent FSK Modulator (CN0186)
标准包装: 1
分辨率(位): 10 b
主 fclk: 500MHz
调节字宽(位): 32 b
电源电压: 1.71 V ~ 1.96 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-VFQFN 裸露焊盘,CSP
供应商设备封装: 56-LFCSP-VQ(8x8)
包装: 托盘
产品目录页面: 552 (CN2011-ZH PDF)
配用: AD9958/PCBZ-ND - BOARD EVALUATION FOR AD9958
AD9958
Data Sheet
Rev. B | Page 24 of 44
MODULATION USING SDIO_x PINS FOR RU/RD
For RU/RD bits = 11, the SDIO_1, SDIO_2, and SDIO_3 pins
are available for RU/RD. In this mode, modulation levels of 2, 4,
and 16 are available. Note that the serial I/O port can be used only
in 1-bit serial mode.
Two-Level Modulation Using SDIO Pins for RU/RD
Table 15. Profile Pin and Channel Assignments in Two-Level
Modulation (RU/RD Enabled)
Profile Pin Config. (PPC)
(FR1[14:12])
P0
P1
P2
P3
XXX
N/A
CH0
CH1
For the configuration in Table 15, each profile pin is dedicated
to a specific channel. In this case, the SDIO_x pins can be used
for the RU/RD function, as described in Table 16.
Four-Level Modulation Using SDIO Pins for RU/RD
For RU/RD bits = 11 (the SDIO_1 and SDIO_2 pins are avail-
able for RU/RD), the modulation level is set to 4. See Table 17
for pin assignments, including SDIO_x pin assignments.
For the configuration shown in Table 17, the profile (channel
word) register is chosen based on the 2-bit value presented to
Profile Pins [P1:P2] or [P3:P4].
For example, if PPC = 101, [P0:P1] = 11, and [P2:P3] = 01, the
contents of the Channel Word 3 register of Channel 0 are
presented to the output of Channel 0 and the contents of the
Channel Word 1 register of Channel 1 are presented to the
output of Channel 1. SDIO_1 and SDIO_2 provide the RU/RD
function.
16-Level Modulation Using SDIO Pins for RU/RD
The RU/RD bits = 11 (SDIO_1 available for RU/RD), and the
level is set to 16. See the pin assignments shown in Table 18.
For the configuration shown in Table 18, the profile (channel
word) register is chosen based on the 4-bit value presented to
Profile Pins [P0:P3]. For example, if PPC = X10 and [P0:P3] =
1101, then the contents of the Channel Word 13 register of
Channel 0 is presented to the output of Channel 0. The SDIO_1
pin provides the RU/RD function.
Table 16. Channel and SDIO_1/SDIO_2/SDIO_3 Pin Assignments for RU/RD Operation
SDIO_1
SDIO_2
SDIO_3
Description
1
0
Triggers the ramp-up function for CH0
1
0
1
Triggers the ramp-down function for CH0
1
0
Triggers the ramp-up function for CH1
1
Triggers the ramp-down function for CH1
Table 17. Channel and Profile Pin Assignments, Including SDIO_1/SDIO_2/SDIO_3 Pin Assignments for RU/RD Operation
Profile Pin Configuration (PPC) (FR1[14:12])
P0
P1
P2
P3
SDIO_1
SDIO_2
SDIO_3
101
CH0
CH1
CH0 RU/RD
CH1 RU/RD
N/A
Table 18. Channel and Profile Pin Assignments, Including SDIO_1 Pin Assignments for RU/RD Operation
Profile Pin Configuration (PPC) (FR1[14:12])
P0
P1
P2
P3
SDIO_1
SDIO_2
SDIO_3
X10
CH0
CH0 RU/RD
N/A
X11
CH1
CH1 RU/RD
N/A
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