参数资料
型号: ADA4062-4ARUZ-RL
厂商: Analog Devices Inc
文件页数: 1/20页
文件大小: 0K
描述: IC OPAMP JFET 1.4MHZ QD 14TSSOP
标准包装: 2,500
放大器类型: J-FET
电路数: 4
转换速率: 3.3 V/µs
增益带宽积: 1.4MHz
电流 - 输入偏压: 2pA
电压 - 输入偏移: 750µV
电流 - 电源: 165µA
电流 - 输出 / 通道: 20mA
电压 - 电源,单路/双路(±): 8 V ~ 36 V,±4 V ~ 18 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 带卷 (TR)
Low Power JFET-Input Op Amps
ADA4062-2/ADA4062-4
Rev. B
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rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
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FEATURES
Low input bias current: 50 pA maximum
Offset voltage
1.5 mV maximum for B grade (ADA4062-2 SOIC package)
2.5 mV maximum for A grade
Offset voltage drift: 5 μV/°C typical
Slew rate: 3.3 V/μs typical
CMRR: 90 dB typical
Low supply current: 165 μA typical
High input impedance
Unity-gain stable
±5 V to ±15 V dual-supply operation
Packaging
8-lead SOIC, 8-lead MSOP, 10-lead LFCSP, 14-lead TSSOP, and
16-lead LFCSP packages
APPLICATIONS
Power controls and monitoring
Active filters
Industrial/process controls
Body probe electronics
Data acquisition
Integrators
Input buffering
GENERAL DESCRIPTION
The ADA4062-2 and ADA4062-4 are dual and quad JFET-input
amplifiers with industry-leading performance. They offer lower
power, offset voltage, drift, and ultralow bias current. The
ADA4062-2 B grade (SOIC package) features a typical low offset
voltage of 0.5 mV, an offset drift of 5 μV/°C, and a bias current
of 2 pA.
The ADA4062 family is ideal for various applications, including
process controls, industrial and instrumentation equipment,
active filtering, data conversion, buffering, and power control
and monitoring. With a low supply current of 165 μA per
amplifier, they are well suited for lower power applications.
The ADA4062 family is also specified for the extended industrial
temperature range of 40°C to +125°C. The ADA4062-2 is
available in lead-free, 8-lead SOIC, 8-lead MSOP, and 10-lead
LFCSP (1.6 mm × 1.3 mm × 0.55 mm) packages, while the
ADA4062-4 is available in lead-free, 14-lead TSSOP and
16-lead LFCSP packages.
PIN CONFIGURATIONS
OUT A 1
–IN A 2
+IN A 3
V– 4
V+
8
OUT B
7
–IN B
6
+IN B
5
ADA4062-2
TOP VIEW
(Not to Scale)
07
67
0-
0
01
Figure 1. 8-Lead Narrow-Body SOIC and 8-Lead MSOP
7
8
3
2
5
6
4
N
C
+
IN
B
V
–IN A
+IN A
OUT B
–IN B
NC = NO CONNECT
07
67
0-
06
5
10
9
1
N
C
V
+
O
U
T
A
TOP VIEW
(Not to Scale)
ADA4062-2
Figure 2. 10-Lead LFCSP
ADA4062-4
1
2
3
4
5
6
7
–IN A
+IN A
V+
OUT B
–IN B
+IN B
OUT A
14
13
12
11
10
9
8
–IN D
+IN D
V–
OUT C
–IN C
+IN C
OUT D
TOP VIEW
(Not to Scale)
07
67
0-
06
4
Figure 3. 14-Lead TSSOP
07
67
0-
0
68
NOTES
1. NC = NO CONNECT.
2. IT IS RECOMMENDED TO CONNECT THE EXPOSED PAD TO V–.
ADA4062-4
TOP VIEW
(Not to Scale)
–IN A
+IN A
V+
+IN B
–IN D
+IN D
V–
+IN C
–I
N
B
OU
T
B
OU
T
C
–I
N
C
NC
OU
T
A
OU
T
D
NC
12
11
10
1
3
4
9
2
6
5
7
8
16
15
14
13
Figure 4. 16-Lead LFCSP
Table 1. Low Power Op Amps
Precision
CMOS
Precision
High Bandwidth
High
Bandwidth
Single
Dual
Quad
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