参数资料
型号: ADA4940-2ACPZ-RL
厂商: Analog Devices Inc
文件页数: 16/33页
文件大小: 0K
描述: IC DIFF ADC DVR 18BIT LN 24LFCSP
标准包装: 5,000
放大器类型: 差分
电路数: 2
输出类型: 差分
转换速率: 95 V/µs
-3db带宽: 260MHz
电流 - 输入偏压: 1.1µA
电压 - 输入偏移: 60µV
电流 - 电源: 1.25mA
电流 - 输出 / 通道: 46mA
电压 - 电源,单路/双路(±): 3 V ~ 7 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-VFQFN 裸露焊盘,CSP
供应商设备封装: 24-LFCSP-VQ(4x4)
包装: 带卷 (TR)
ADA4940-1/ADA4940-2
Data Sheet
Rev. C | Page 22 of 32
THEORY OF OPERATION
The ADA4940-1/ADA4940-2 are high speed, low power
differential amplifiers fabricated on Analog Devices advanced
dielectrically isolated SiGe bipolar process. They provide two
closely balanced differential outputs in response to either
differential or single-ended input signals. An external feedback
network that is similar to a voltage feedback operational
amplifier sets the differential gain. The output common-mode
voltage is independent of the input common-mode voltage and
is set by an external voltage at the VOCM terminal. The PNP
input stage allows input common-mode voltages between the
negative supply and 1.2 V below the positive supply. A rail-to-
rail output stage supplies a wide output voltage range.
The DISABLE pin can be used to reduce the supply current of
the amplifier to 13.5 A.
The differential feedback loop consists of the differential trans-
conductance GDIFF working through the GO output buffers and
the RF/RG feedback networks. The common-mode feedback
loop is set up with a voltage divider across the two differential
outputs to create an output voltage midpoint and a common-
mode transconductance, GCM.
08452-
058
GO
CC
RF
RG
GCM
GDIFF
GO
RG
VREF
–OUT
+OUT
RF
+DIN
–DIN
+IN
–IN
VOCM
Figure 62. ADA4940-1/ADA4940-2 Architectural Block
The differential feedback loop forces the voltages at +IN and IN
to equal each other. This fact sets the following relationships:
F
OUT
G
IN
R
V
R
D
=
+
F
OUT
G
IN
R
V
R
D
+
=
Subtracting the previous equations gives the relationship that
shows RF and RG setting the differential gain.
(V+OUT VOUT) = (+DIN – (DIN)) ×
G
F
R
The common-mode feedback loop drives the output common-
mode voltage that is sampled at the midpoint of the output
voltage divider to equal the voltage at VOCM. This results in the
following relationships:
V+OUT = VOCM +
2
dm
OUT,
V
VOUT = VOCM
2
dm
OUT,
V
Note that the differential amplifier’s summing junction input
voltages, +IN and IN, are set by both the output voltages and
the input voltages.
+
+
=
+
G
F
G
OUT
G
F
IN
R
V
R
D
V
+
+
=
+
G
F
G
OUT
G
F
IN
R
V
R
D
V
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