参数资料
| 型号： | ADATE304BBCZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 28/52页 |
| 文件大小： | 0K |
| 描述： | IC DCL ATE 200MHZ DUAL 84CSPBGA |
| 标准包装： | 1 |
| 类型： | DCL |
| 应用： | 自动测试设备 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 84-TFBGA，CSPBGA |
| 供应商设备封装： | 84-CSPBGA（9x9） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页当前第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页
ADATE304
Rev. 0 | Page 34 of 52
DEFINITION OF SPI WORD
The SPI can accept variable length words, depending on the
operation. At most, the word length equals 24 bits: 16 bits of
data, two channel selects, one read/write (R/W) selector, and a
5-bit address.
Depending on the operation, the data can be smaller or, in the
case of a read operation, nonexistent.
Table 18. Channel Selection
Channel 1
Channel 0
Channel Selected
0
NOP (no channel selected, no register
changes)
0
1
Channel 0 selected
1
0
Channel 1 selected
1
Channel 0 and Channel 1 selected
Table 19. R/W Definition
R/W
Description
0
Current register specified by address shifts out of
SDOUT on next shift operation
1
Current data written to the register specified by
address and channel select
Example 1: 16-Bit Write
Write 16 bits of data to a register or DAC; ignore unused MSBs. For example, Bit 15 and Bit 14 are ignored, and Bit 13 through Bit 0 are
applied to the 14-bit DAC.
07
279
-068
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 64. 16-Bit Write
Example 2: 14-Bit Write
Write 14 bits of data to the DAC.
9
-06
DATA[13:0]
CH[1:0]
R/W
ADDR[4:0]
07
279
Figure 65. 14-Bit Write
Example 3a: 2-Bit Write
Write two bits of data to the 2-bit register.
DATA[1:0]
CH[1:0]
R/W
ADDR[4:0]
07
27
9-
07
0
Figure 66. 2-Bit Write
Example 3b: 2-Bit Write
Write two bits of data to the 2-bit register. Bit 15 through Bit 2 are ignored and Bit 1 through Bit 0 are applied to the register.
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
07
279
-071
Figure 67. 2-Bit Write
Example 4: Read Request
Read request and follow with a second instruction (could be NOP) to clock out the data.
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
CH[1:0]
R/W = 0
ADDR[4:0]
07
27
9-
072
Figure 68. Read Request
相关PDF资料 |
PDF描述 |
|---|---|
| ADATE305BSVZ | IC DCL ATE 250MHZ DUAL 100TQFP |
| ADAU1328BSTZ | IC CODEC 24BIT 2ADC/8DAC 48LQFP |
| ADAU1361BCPZ-R7 | IC CODEC 24B PLL 32LFCSP |
| ADAU1373BCBZ-RL | IC CODEC LP CLASS G HP 81WLCSP |
| ADAU1381BCPZ | IC AUDIO CODEC STEREO LN 32LFCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADATE305 | 制造商:AD 制造商全称:Analog Devices 功能描述:250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH |
| ADATE305BSVZ | 功能描述:IC DCL ATE 250MHZ DUAL 100TQFP RoHS:是 类别:集成电路 (IC) >> 专用 IC 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| ADATE306BBCZ | 制造商:Analog Devices 功能描述: |
| ADATE318 | 制造商:AD 制造商全称:Analog Devices 功能描述:600 MHz Dual Integrated DCL with PPMU, VHH Drive Capability, Level Setting DACs, and On-Chip |
| ADATE318BCPZ | 制造商:Analog Devices 功能描述:600 MHZ DUAL INTEGRATED DCL WITH PPMU, VHH DRIVE CAPABILITY, - Trays |
发布紧急采购，3分钟左右您将得到回复。